Benchmarks for the specific target "UC3"

Here is a list of benchmarks available.

Filtering

• FIR
  Computation of a 256-point signal with a 24-TAP filter:
  12,712 cycles (423.7us @ 30MHz) for dsp16_filt_fir
  36,432 cycles (1.21ms @ 30MHz) for dsp32_filt_fir.
• Partial_IIR
  Computation of a 256-point signal with a 7th order filter:
  15,006 cycles (500.2us @ 30MHz) for dsp16_filt_iirpart
  33,333 cycles (1.11ms @ 30MHz) for dsp32_filt_iirpart.
• LMS
  Computation of a 256-point signal:
  3,124 cycles (104.1us @ 30MHz) for dsp16_filt_lms
  5,317 cycles (177.2us @ 30MHz) for dsp32_filt_lms.
• NLMS
  Computation of a 256-point signal:
  3,706 cycles (123.5us @ 30MHz) for dsp16_filt_nlms
  6,820 cycles (227.3us @ 30MHz) for dsp32_filt_nlms.

Operators

• Sine / Cosine
  48 cycles (1.6us @ 30MHz) for dsp16_op_sin
  196 cycles (6.5us @ 30MHz) for dsp32_op_sin.
• Arc sine / Arc cosine
  70 to 153 cycles (2.3/5.1us @ 30MHz) for dsp16_op_acos
  161 to 570 cycles (5.4/19us @ 30MHz) for dsp32_op_acos.
• Absolute
  1 cycle (33ns @ 30MHz) for dsp16_op_abs
  1 cycle (33ns @ 30MHz) for dsp32_op_abs.
• Square root
  61 cycles (2.0us @ 30MHz) for dsp16_op_sqrt
  450 cycles (15us @ 30MHz) for dsp32_op_sqrt.
• Natural logarithm / Binary logarithm or base 2 logarithm / Common logarithm or base 10 logarithm
  90 to 102 cycles (3.0/3.4us @ 30MHz) for dsp16_op_ln, dsp16_op_log2, dsp16_op_log10
  555 to 570 cycles (18.5/19us @ 30MHz) for dsp32_op_ln, dsp32_op_log2, dsp32_op_log10.
• Exponential
  70 cycles (2.3us @ 30MHz) for dsp16_op_exp
  175 cycles (5.8us @ 30MHz) for dsp32_op_exp.
• Power
  166 to 200 cycles (5.5/6.7us @ 30MHz) for dsp16_op_pow
  660 to 790 cycles (22.0/26.3us @ 30MHz) for dsp32_op_pow.
• Random
  20 cycles (0.7us @ 30MHz) for dsp16_op_rand
  18 cycles (0.6us @ 30MHz) for dsp32_op_rand.

Signal Generation

• Cosinusoidal / Sinusoidal
  Generation of a 100-points signal:
  5,752 cycles (191.7us @ 30MHz) for dsp16_gen_cos, dsp16_gen_sin
  19,229 cycles (641.0us @ 30MHz) for dsp32_gen_cos, dsp32_gen_sin.
• Noise
  Generation of a 100-points signal:
  2,335 cycles (77.8us @ 30MHz) for dsp16_gen_noise
  2,240 cycles (74.7us @ 30MHz) for dsp32_gen_noise.

Transforms

• Real_Complex_FFT
  Computation of a 256-points real to complex FFT:
  13,661 cycles (455.4us @ 30MHz) for dsp16_trans_realcomplexfft
  74,297 cycles (2.48ms @ 30MHz) for dsp32_trans_realcomplexfft.

Vectors

• Addition
  Addition of two 256-point vectors:
  1,252 cycles (41.7us @ 30MHz) for dsp16_vect_add
  1,638 cycles (54.6us @ 30MHz) for dsp32_vect_add.
• Subtraction
  Subtraction of two 256-point vectors:
  1,252 cycles (41.7us @ 30MHz) for dsp16_vect_sub
  1,638 cycles (54.6us @ 30MHz) for dsp32_vect_sub.
• Multiplication with a real
  Multiplication of one 256-point vectors with a real number:
  1,452 cycles (48.4us @ 30MHz) for dsp16_vect_realmul
  1,909 cycles (63.6us @ 30MHz) for dsp32_vect_realmul.
• Division with a real
  Division of one 256-point vectors with a real number:
  10,338 cycles (344.6us @ 30MHz) for dsp16_vect_realdiv
  47,291 cycles (1.58ms @ 30MHz) for dsp32_vect_realdiv.
• Dot multiplication
  Dot multiplication of two 256-point vectors:
  1,561 cycles (52.0us @ 30MHz) for dsp16_vect_dotmul
  2,341 cycles (78.0us @ 30MHz) for dsp32_vect_dotmul.
• Dot division
  Dot division of two 256-point vectors:
  10,700 cycles (356.7us @ 30MHz) for dsp16_vect_dotdiv
  57,400 cycles (1.91ms @ 30MHz) for dsp32_vect_dotdiv.
• Power
  Raised to the power of one 256-point vectors with a real number:
  51,927 cycles (1.73ms @ 30MHz) for dsp16_vect_pow
  167,276 cycles (5.58ms @ 30MHz) for dsp32_vect_pow.
• Minimum
  Minimum of a 256-point vector:
  1,023 cycles (34.1us @ 30MHz) for dsp16_vect_min
  1,065 cycles (35.5us @ 30MHz) for dsp32_vect_min.
• Maximum
  Maximum of a 256-point vector:
  1,023 cycles (34.1us @ 30MHz) for dsp16_vect_max
  1,065 cycles (35.5us @ 30MHz) for dsp32_vect_max.
• Negate
  Negate of a 256-point vector:
  1,189 cycles (39.6us @ 30MHz) for dsp16_vect_neg
  1,389 cycles (46.3us @ 30MHz) for dsp32_vect_neg.
• Convolution
  Computation of a 64-points signal with another 64-point signal:
  19,087 cycles (636.2us @ 30MHz) for dsp16_vect_conv
  50,501 cycles (1.68ms @ 30MHz) for dsp32_vect_conv.
• Partial Convolution
  Computation of a 256-points signal with a 24-points signal:
  12,712 cycles (423.7us @ 30MHz) for dsp16_vect_convpart
  36,432 cycles (1.21ms @ 30MHz) for dsp32_vect_convpart.

ADPCM

• Encoding a 100-element vector:
  5,819 cycles (194.0us @ 30MHz) using dsp_adpcm_ima_encode.
• Decoding a 100-element vector:
  4,740 cycles (158.0us @ 30MHz) using dsp_adpcm_ima_decode.