Microchip® Advanced Software Framework

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Clock Management

Modules

 DFLL Management
 A Digital Frequency Locked Loop can be used to generate a highly accurate frequency from a slower-running reference clock, in much the same way as a PLL.
 
 Generic Clock Management
 Generic clocks are configurable clocks which run outside the system clock domain.
 
 Oscillator Management
 This group contains functions and definitions related to configuring and enabling/disabling on-chip oscillators.
 
 PLL Management
 This group contains functions and definitions related to configuring and enabling/disabling on-chip PLLs.
 
 System Clock Management
 See Quick Start Guide for the System Clock Management service (SAM4L).