SAM Direct Memory Access Controller Driver.
Copyright (c) 2014-2020 Microchip Technology Inc. and its subsidiaries.
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| enum | dma_address_increment_stepsize {
DMA_ADDRESS_INCREMENT_STEP_SIZE_1 = 0,
DMA_ADDRESS_INCREMENT_STEP_SIZE_2,
DMA_ADDRESS_INCREMENT_STEP_SIZE_4,
DMA_ADDRESS_INCREMENT_STEP_SIZE_8,
DMA_ADDRESS_INCREMENT_STEP_SIZE_16,
DMA_ADDRESS_INCREMENT_STEP_SIZE_32,
DMA_ADDRESS_INCREMENT_STEP_SIZE_64,
DMA_ADDRESS_INCREMENT_STEP_SIZE_128
} |
| | Address increment step size. More...
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| |
| enum | dma_beat_size {
DMA_BEAT_SIZE_BYTE = 0,
DMA_BEAT_SIZE_HWORD,
DMA_BEAT_SIZE_WORD
} |
| | The basic transfer unit in DMAC is a beat, which is defined as a single bus access. More...
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| enum | dma_block_action {
DMA_BLOCK_ACTION_NOACT = 0,
DMA_BLOCK_ACTION_INT,
DMA_BLOCK_ACTION_SUSPEND,
DMA_BLOCK_ACTION_BOTH
} |
| | Block action definitions. More...
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| |
| enum | dma_callback_type {
DMA_CALLBACK_TRANSFER_ERROR,
DMA_CALLBACK_TRANSFER_DONE,
DMA_CALLBACK_CHANNEL_SUSPEND,
DMA_CALLBACK_N
} |
| | Callback types for DMA callback driver. More...
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| |
| enum | dma_event_input_action {
DMA_EVENT_INPUT_NOACT,
DMA_EVENT_INPUT_TRIG,
DMA_EVENT_INPUT_CTRIG,
DMA_EVENT_INPUT_CBLOCK,
DMA_EVENT_INPUT_SUSPEND,
DMA_EVENT_INPUT_RESUME,
DMA_EVENT_INPUT_SSKIP
} |
| | DMA input actions. More...
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| |
| enum | dma_event_output_selection {
DMA_EVENT_OUTPUT_DISABLE = 0,
DMA_EVENT_OUTPUT_BLOCK,
DMA_EVENT_OUTPUT_RESERVED,
DMA_EVENT_OUTPUT_BEAT
} |
| | Event output selection. More...
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| |
| enum | dma_priority_level {
DMA_PRIORITY_LEVEL_0,
DMA_PRIORITY_LEVEL_1,
DMA_PRIORITY_LEVEL_2,
DMA_PRIORITY_LEVEL_3
} |
| | DMA priority level. More...
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| |
| enum | dma_step_selection {
DMA_STEPSEL_DST = 0,
DMA_STEPSEL_SRC
} |
| | DMA step selection. More...
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| enum | dma_transfer_trigger_action {
DMA_TRIGGER_ACTION_BLOCK = DMAC_CHCTRLB_TRIGACT_BLOCK_Val,
DMA_TRIGGER_ACTION_BEAT = DMAC_CHCTRLB_TRIGACT_BEAT_Val,
DMA_TRIGGER_ACTION_TRANSACTION = DMAC_CHCTRLB_TRIGACT_TRANSACTION_Val
} |
| | DMA trigger action type. More...
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1.8.5