Microchip® Advanced Software Framework

Quick Start Guide for SYSTEM CLOCK - GCLK Configuration

In this use-case, the GCLK module is configured for:

  • One generator attached to the internal 8MHz RC oscillator clock source
  • Generator output equal to input frequency divided by a factor of 128
  • One channel (connected to the TC0 module) enabled with the enabled generator selected

This use-case configures a clock channel to output a clock for a peripheral within the device, by first setting up a clock generator from a master clock source, and then linking the generator to the desired channel. This clock can then be used to clock a module within the device.

Setup

Prerequisites

There are no special setup requirements for this use-case.

Code

Copy-paste the following setup code to your user application:

{
struct system_gclk_gen_config gclock_gen_conf;
#if (SAML21) || (SAML22) || (SAMR30)
gclock_gen_conf.source_clock = SYSTEM_CLOCK_SOURCE_OSC16M;
gclock_gen_conf.division_factor = 128;
#elif (SAMC21)
gclock_gen_conf.source_clock = SYSTEM_CLOCK_SOURCE_OSC48M;
gclock_gen_conf.division_factor = 128;
#else
gclock_gen_conf.source_clock = SYSTEM_CLOCK_SOURCE_OSC8M;
gclock_gen_conf.division_factor = 128;
#endif
}
{
#if (SAMD10) || (SAMD11) || SAMR30
#else
#endif
}

Add to user application initialization (typically the start of main()):

Workflow

  1. Create a GCLK generator configuration struct, which can be filled out to adjust the configuration of a single clock generator.
    struct system_gclk_gen_config gclock_gen_conf;
  2. Initialize the generator configuration struct with the module's default values.
    Note
    This should always be performed before using the configuration struct to ensure that all values are initialized to known default settings.
  3. Adjust the configuration struct to request the master clock source channel 0 is used as the source of the generator, and set the generator output prescaler to divide the input clock by a factor of 128.
    gclock_gen_conf.source_clock = SYSTEM_CLOCK_SOURCE_OSC16M;
    gclock_gen_conf.division_factor = 128;
  4. Configure the generator using the configuration structure.
    Note
    The existing configuration struct may be re-used, as long as any values that have been altered from the default settings are taken into account by the user application.
  5. Enable the generator once it has been properly configured, to begin clock generation.
  6. Create a GCLK channel configuration struct, which can be filled out to adjust the configuration of a single generic clock channel.
  7. Initialize the channel configuration struct with the module's default values.
    Note
    This should always be performed before using the configuration struct to ensure that all values are initialized to known default settings.
  8. Adjust the configuration struct to request the previously configured and enabled clock generator is used as the clock source for the channel.
  9. Configure the channel using the configuration structure.
    Note
    The existing configuration struct may be re-used, as long as any values that have been altered from the default settings are taken into account by the user application.
  10. Enable the channel once it has been properly configured, to output the clock to the channel's peripheral module consumers.

Use-case

Code

Copy-paste the following code to your user application:

while (true) {
/* Nothing to do */
}

Workflow

  1. As the clock is generated asynchronously to the system core, no special extra application code is required.