Microchip® Advanced Software Framework

USB Host Basic Setup

USB Host User Configuration

The following USB host configuration must be included in the conf_usb_host.h file of the application:

1. USB_HOST_UHI (List of UHI APIs).

Define the list of UHI supported by USB host. (E.g.: UHI_MSC, UHI_HID_MOUSE).

2. USB_HOST_POWER_MAX (mA).

Maximum current allowed on Vbus.

3. USB_HOST_HS_SUPPORT (Only defined).

Authorize the USB host to run in High Speed.

4. USB_HOST_HUB_SUPPORT (Only defined).

Authorize the USB HUB support.

USB Host User Callback

The following optional USB host callback can be defined in the conf_usb_host.h file of the application:

1. void UHC_MODE_CHANGE (bool b_host_mode).

To notify that the USB mode are switched automatically. This is possible only when ID pin is available.

2. void UHC_VBUS_CHANGE (bool b_present).

To notify that the Vbus level has changed (Available only in USB hardware with Vbus monitoring).

3. void UHC_VBUS_ERROR (void).

To notify that a Vbus error has occurred (Available only in USB hardware with Vbus monitoring).

4. void UHC_CONNECTION_EVENT (uhc_device_t* dev, bool b_present).

To notify that a device has been connected or disconnected.

5. void UHC_WAKEUP_EVENT (void).

Called when a USB device or the host have wake up the USB line.

6. void UHC_SOF_EVENT (void).

Called for each received SOF each 1ms. Available in High and Full speed mode.

7. uint8_t UHC_DEVICE_CONF (uhc_device_t* dev).

Called when a USB device configuration must be chosen. Thus, the application can choose either a configuration number for this device or a configuration number 0 to reject it. If callback not defined the configuration 1 is chosen.

8. void UHC_ENUM_EVENT (uhc_device_t* dev, uint8_t b_status).

Called when a USB device enumeration is completed or failed.

USB Host Setup Steps

USB Host Controller (UHC) - Prerequisites

Common prerequisites for all USB hosts.

This module is based on USB host stack full interrupt driven and supporting sleepmgr. For AVR® and Atmel® | SMART ARM®-based SAM3/4 devices the clock services is supported. For SAM D21 devices the clock driver is supported.

The following procedure must be executed to setup the project correctly:

  • Specify the clock configuration:
    • UC3 and SAM3/4 devices without USB high speed support need 48MHz clock input. You must use a PLL and an external OSC.
    • UC3 and SAM3/4 devices with USB high speed support need 12MHz clock input. You must use an external OSC.
    • UC3 devices with USBC hardware need CPU frequency higher than 25MHz
    • SAM D21 devices without USB high speed support need 48MHz clock input. You must use a DFLL and an external OSC.
  • In conf_board.h, the define CONF_BOARD_USB_PORT must be added to enable USB lines. (Not mandatory for all boards).
  • Enable interrupts
  • Initialize the clock service

The usage of sleep manager service is optional, but recommended to reduce power consumption:

  • Initialize the sleep manager service
  • Activate sleep mode when the application is in IDLE state

For AVR and SAM3/4 devices, add to the initialization code:

sysclk_init();
sleepmgr_init(); // Optional

For SAM D21 devices, add to the initialization code:

Add to the main IDLE loop:

sleepmgr_enter_sleep(); // Optional

USB Host Controller (UHC) - Example Code

Common example code for all USB hosts.

Content of conf_usb_host.h:

#define USB_HOST_POWER_MAX 500

Add to application C-file:

void usb_init(void)
{
}

USB Device Controller (UHC) - Workflow

Common workflow for all USB devices.

  1. Ensure that conf_usb_host.h is available and contains the following configuration which is the main USB device configuration:
    // Maximum current allowed on Vbus (mA) which depends of 5V generator
    #define USB_HOST_POWER_MAX 500 // (500mA)
  2. Call the USB host stack start function to enable USB Host stack:

conf_clock.h examples with USB support

Content of conf_clock.h for AT32UC3A0, AT32UC3A1, and AT32UC3B devices (USBB):

// Configuration based on 12MHz external OSC:
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
#define CONFIG_PLL1_MUL 8
#define CONFIG_PLL1_DIV 2
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)

Content of conf_clock.h for AT32UC3A3 and AT32UC3A4 devices (USBB with high speed support):

// Configuration based on 12MHz external OSC:
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)

Content of conf_clock.h for AT32UC3C device (USBC):

// Configuration based on 12MHz external OSC:
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
#define CONFIG_PLL1_MUL 8
#define CONFIG_PLL1_DIV 2
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
// CPU clock need of clock > 25MHz to run with USBC
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL1

Content of conf_clock.h for SAM3X and SAM3A devices (UOTGHS: USB OTG High Speed):

// USB Clock Source fixed at UPLL.
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_UPLL
#define CONFIG_USBCLK_DIV 1

Content of conf_clocks.h for SAM D21 devices (USB):

// USB Clock Source fixed at DFLL.
// SYSTEM_CLOCK_SOURCE_XOSC32K configuration - External 32KHz crystal/clock oscillator
# define CONF_CLOCK_XOSC32K_ENABLE true
# define CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
# define CONF_CLOCK_XOSC32K_STARTUP_TIME SYSTEM_XOSC32K_STARTUP_65536
# define CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL false
# define CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT false
# define CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT true
# define CONF_CLOCK_XOSC32K_ON_DEMAND false
# define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY true
// SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop
# define CONF_CLOCK_DFLL_ENABLE true
# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED
# define CONF_CLOCK_DFLL_ON_DEMAND true
// DFLL closed loop mode configuration
# define CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR GCLK_GENERATOR_1
# define CONF_CLOCK_DFLL_MULTIPLY_FACTOR (48000000/32768)
# define CONF_CLOCK_DFLL_QUICK_LOCK true
# define CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK true
# define CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP true
# define CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE true
# define CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE (0x1f / 8)
# define CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE (0xff / 8)
# define CONF_CLOCK_CONFIGURE_GCLK true
// Configure GCLK generator 0 (Main Clock)
# define CONF_CLOCK_GCLK_0_ENABLE true
# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY true
# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL
# define CONF_CLOCK_GCLK_0_PRESCALER 1
# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
// Configure GCLK generator 1
# define CONF_CLOCK_GCLK_1_ENABLE true
# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_1_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_XOSC32K
# define CONF_CLOCK_GCLK_1_PRESCALER 1
# define CONF_CLOCK_GCLK_1_OUTPUT_ENABLE true