#include "qt60168.h"
Macros | |
#define | QT60168_AKS 0x00 |
#define | QT60168_BL 0x02 |
#define | QT60168_BS 0x01 |
#define | QT60168_EEPROM_CRC 0x0A |
#define | QT60168_FDIL 0x04 |
#define | QT60168_LSL 0x0064 |
#define | QT60168_MSYNC 0x00 |
#define | QT60168_NDIL 0x02 |
#define | QT60168_NDRIFT 0x0F |
#define | QT60168_NRD 0x14 |
#define | QT60168_NTHR 0x0F |
#define | QT60168_SPI_BITS 8 |
Number of bits in each SPI transfer. More... | |
#define | QT60168_SPI_FIRST_NPCS QT60168_SPI_NCPS |
First chip select used by QT60168 components on the SPI module instance. More... | |
#define | QT60168_SPI_MASTER_SPEED 1000000 |
SPI master speed in Hz. More... | |
#define | QT60168_SSYNC 0x00 |
Variables | |
const qt60168_setups_block_t | qt60168_setups_block |
if define, DRDY is not checked, a delay function to wait chip to be ready More... | |
#define QT60168_AKS 0x00 |
#define QT60168_BL 0x02 |
#define QT60168_BS 0x01 |
#define QT60168_EEPROM_CRC 0x0A |
#define QT60168_FDIL 0x04 |
#define QT60168_LSL 0x0064 |
#define QT60168_MSYNC 0x00 |
#define QT60168_NDIL 0x02 |
#define QT60168_NDRIFT 0x0F |
#define QT60168_NRD 0x14 |
#define QT60168_NTHR 0x0F |
#define QT60168_SPI_BITS 8 |
Number of bits in each SPI transfer.
Referenced by qt60168_resources_init().
#define QT60168_SPI_FIRST_NPCS QT60168_SPI_NCPS |
First chip select used by QT60168 components on the SPI module instance.
#define QT60168_SPI_MASTER_SPEED 1000000 |
SPI master speed in Hz.
Referenced by qt60168_resources_init().
#define QT60168_SSYNC 0x00 |
const qt60168_setups_block_t qt60168_setups_block |
if define, DRDY is not checked, a delay function to wait chip to be ready
Referenced by qt60168_init(), and qt60168_setup().