#define DFU_BUFFER_LENGTH ((DFU_BUFFER_LENGTH_READ < DFU_BUFFER_LENGTH_WRITE) ? DFU_BUFFER_LENGTH_WRITE : DFU_BUFFER_LENGTH_READ) |
Referenced by write_mem().
#define DFU_BUFFER_LENGTH_READ 255 |
Referenced by erase_check_mem(), and read_mem().
#define DFU_BUFFER_LENGTH_WRITE 2048 |
#define ISP_CFG1 (*(volatile U32 *)ISP_CFG1_ADDRESS) |
Referenced by force_isp(), and is_isp_forced().
#define ISP_CFG1_ADDRESS (FLASH_API_USER_PAGE_ADDRESS + ISP_CFG1_OFFSET) |
#define ISP_CFG1_BOOT_KEY1 16 |
#define ISP_CFG1_BOOT_KEY1_MASK 0xFFFF0000 |
#define ISP_CFG1_BOOT_KEY1_OFFSET 16 |
#define ISP_CFG1_BOOT_KEY1_SIZE 16 |
#define ISP_CFG1_BOOT_KEY1_VALUE 0xE11E |
#define ISP_CFG1_CRC8 0 |
#define ISP_CFG1_CRC8_MASK 0x000000FF |
Referenced by force_isp().
#define ISP_CFG1_CRC8_OFFSET 0 |
Referenced by force_isp().
#define ISP_CFG1_CRC8_POLYNOMIAL 0x107 |
#define ISP_CFG1_CRC8_SIZE 8 |
#define ISP_CFG1_FORCE 9 |
#define ISP_CFG1_FORCE_MASK 0x00000200 |
Referenced by force_isp(), and is_isp_forced().
#define ISP_CFG1_FORCE_OFFSET 9 |
Referenced by force_isp(), and is_isp_forced().
#define ISP_CFG1_FORCE_SIZE 1 |
#define ISP_CFG1_IO_COND_EN 8 |
#define ISP_CFG1_IO_COND_EN_MASK 0x00000100 |
#define ISP_CFG1_IO_COND_EN_OFFSET 8 |
#define ISP_CFG1_IO_COND_EN_SIZE 1 |
#define ISP_CFG1_OFFSET 0x000000FC |
Referenced by force_isp().
#define ISP_CFG1_SIZE 4 |
#define ISP_CFG2 (*(volatile U32 *)ISP_CFG2_ADDRESS) |
#define ISP_CFG2_ADDRESS (FLASH_API_USER_PAGE_ADDRESS + ISP_CFG2_OFFSET) |
#define ISP_CFG2_BOOT_KEY 17 |
#define ISP_CFG2_BOOT_KEY_MASK 0xFFFE0000 |
#define ISP_CFG2_BOOT_KEY_OFFSET 17 |
#define ISP_CFG2_BOOT_KEY_SIZE 15 |
#define ISP_CFG2_BOOT_KEY_VALUE 0x494F |
#define ISP_CFG2_CRC8 0 |
#define ISP_CFG2_CRC8_MASK 0x000000FF |
#define ISP_CFG2_CRC8_OFFSET 0 |
#define ISP_CFG2_CRC8_POLYNOMIAL 0x107 |
#define ISP_CFG2_CRC8_SIZE 8 |
#define ISP_CFG2_IO_COND_LEVEL 16 |
#define ISP_CFG2_IO_COND_LEVEL_MASK 0x00010000 |
#define ISP_CFG2_IO_COND_LEVEL_OFFSET 16 |
#define ISP_CFG2_IO_COND_LEVEL_SIZE 1 |
#define ISP_CFG2_IO_COND_PIN 8 |
#define ISP_CFG2_IO_COND_PIN_MASK 0x0000FF00 |
#define ISP_CFG2_IO_COND_PIN_OFFSET 8 |
#define ISP_CFG2_IO_COND_PIN_SIZE 8 |
#define ISP_CFG2_OFFSET 0x000000F8 |
#define ISP_CFG2_SIZE 4 |
#define ISP_ID0 0x00 |
#define ISP_ID1 0x00 |
#define ISP_KEY (*(volatile U32 *)ISP_KEY_ADDRESS) |
#define ISP_KEY_ADDRESS (AVR32_SRAM_ADDRESS + ISP_KEY_OFFSET) |
#define ISP_KEY_OFFSET 0x00000000 |
#define ISP_KEY_SIZE 4 |
#define ISP_KEY_VALUE ('I' << 24 | 'S' << 16 | 'P' << 8 | 'K') |
#define ISP_OSC 0 |
#define ISP_VERSION 0x02 |
#define PROGRAM_START_ADDRESS (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET) |
#define PROGRAM_START_OFFSET 0x00002000 |