Sleepwalking example with the ACIFB module on AVR UC3 L devices

Introduction

The Example projects demonstrates:

• Sleepwalking Feature in AT32UC3L devices:
  SleepWalking feature allows to reduce the power consumption of the peripherals in sleep modes. It allows the UC3L Event System to handle asynchronous events in various sleep modes by requesting a module local clock for the duration of the Event processing. When the event processing ends, the clock request is dis-asserted and the module goes back to sleep.
  
• Sleepwalking with ACIFB Module in AT32UC3L devices:
  The given example demonstrates the use of Analog Comparator using SleepWalking feature. The ACIFB interface once configured remains in the sleep mode. The AST (Asynchronous Timer) is configured to run at 32KHz oscillator and periodically generates an event which will be used by ACIFB. Upon receiving the event, ACIFB module clock will be enabled and analog value on the selected channels will be sampled. The input signals from positive and negative inputs will be compared. If positive is less than negative input, an interrupt will be generated by ACIFB. This will wake up the CPU as well as rest of the system. The ISR will clear the interrupt and system will toggle the status LED before going back to sleep. In case the positive input is greater than negative input, then ACIFB will go back to sleep mode without waking the entire system.
  
  

Main Files

• conf_example.h : Example Configuration
• conf_clock.h : Clock Configuration
• conf_sleepmgr.h : Sleep Manager configuration
• acifb_sleepwalking_example.c : Sleepwalking with ACIFB Example

References

• Refer Application Note AVR32849: Sleepwalking with AT32UC3L
• Refer Application Note AVR4029: ASF Getting Started Guide
• Refer Application Note AVR 4030: ASF Reference Manual

Compiler Support

The example application supports:

• IAR EWAVR32
• GNU GCC for AVR32

Device Support

• AT32UC3L0 Series

Test Information

This example has been tested with the following :

• AVR Studio 5.0
• IAR32 Embedded Workbench
• STK600 development board, UC3-L0-XPLAINED & UC3L-EK evaluation kits
• 1.8V and 3.3V Supply mode

Setup Information

• CPU Clock Source : DFLL(96MHz) with internal RCSYS as its source
• AST Clock Source : 32KHz external oscillator
• CPU Speed : 12MHz
• PBA Speed : 6MHz
• PBB Speed : 6MHz
• AST Trigger Period: Every 250ms
• UC3L-EK: ACIFB Channel 2
  --------------------------------------------------------—
  ACIFB Input Pin name - UC3L-EK board Port
  --------------------------------------------------------—
  ACIFB ACAP[1] - PA10 Pin 6 on J14 Header
  ACIFB ACAN[1] - PA12 Pin 10 on J14 Header
  --------------------------------------------------------—
  
• UC3-L0-XPLAINED: ACIFB Channel 6
  --------------------------------------------------------—
  ACIFB Input Pin name - UC3-L0-XPLAINED board Port
  --------------------------------------------------------—
  ACIFB ACAP[3] - PB07 Pin 5 on J2 Header
  ACIFB ACAN[3] - PB06 Pin 7 on J2 Header
  --------------------------------------------------------—
  

Contact Information

For further information, visit : Atmel AVR32 .
Technical support & faq, visit : Support and FAQ .

Author

Microchip Technology Inc : http://www.microchip.com