Introduction
This document gives an example of the usage of the CPU Cycle Counter. The cycle counter is a COUNT register, that increments once every clock. The COUNT register can be used together with the COMPARE register to create a timer with interrupt functionality. The COMPARE register holds a value that the COUNT register is compared against. When the COMPARE and COUNT registers match, a compare interrupt request is generated and COUNT is reset to 0.
Example Description
This example shows how to use the COUNT register together with the COMPARE register to generate an interrupt periodically. Here is the operating mode of the example:
- At the beginning of the code, we check that initial default values of the COUNT and COMPARE registers are correct.
- Then, COMPARE register is loaded with a delay specified by delay_clock_cycles. This delay is (1 / fCPU) * delay_clock_cycles.
- Then the program infinitely loops, using the COUNT and COMPARE interrupt with the above delay. Messages are displayed on USART and one of Led0 through Led3 will be ON upon each COUNT and COMPARE match (Led0 -> Led1 -> Led2 -> Led3 -> Led0 ...and so on).
Main Files
Compilation Info
This software was written for GCC for AVR32 and IAR Embedded Workbench for AVR32. Other compilers may or may not work.
Information
This example has been tested with the following configuration:
- EVK1100, EVK1101, EVK1104, EVK1105, AT32UC3C-EK or AT32UC3L-EK evaluation kits; STK600+RCUC3L routing card, STK600+RCUCD routing card;
- CPU clock: 16MHz in UC3C_EK and 12 MHz in all other boards. – EVK1100, EVK1101, EVK1104, EVK1105, AT32UC3L-EK, STK600+RCUC3L : 12 MHz – AT32UC3C-EK : 16 MHz
- PC terminal settings:
- 57600 bps,
- 8 data bits,
- no parity bit,
- 1 stop bit,
- no flow control.
Contact Information
For further information, visit Atmel AVR32.
Microchip ASF.
Support and FAQ: https://www.microchip.com/support/