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CPU Cycle Counter Example for AT32UC3A0512 in AVR Simulator Documentation

Introduction

This document gives an example of the usage of the CPU Cycle counter. The cycle counter is a COUNT register, that increments once every clock. The count register can be used together with the COMPARE register to create a timer with interrupt functionality. The COMPARE register holds a value that the COUNT register is compared against. When the COMPARE and COUNT registers match, a compare interrupt request is generated and COUNT is reset to 0.

Example Description

This example shows how to use the COUNT register together with the COMPARE register to generate an interrupt periodically. Here is the operating mode of the example:

  • At the beginning of the code, we check that initial default values of the COUNT and COMPARE registers are correct.
  • Then, COMPARE register is loaded with a delay specified by delay_clock_cycles. This delay is (1 / fCPU) * delay_clock_cycles.
  • Then the program infinitely loops, using the COUNT and COMPARE interrupt with the above delay. Upon each COUNT and COMPARE match, GPIO line is toggled.

Main Files

Compilation Info

This software was written for the GNU GCC for AVR32.

Configuration Information

This example has been tested with the following configuration:

  • AVR Simulator
  • CPU clock: Internal RC oscillator (about 115200 Hz) .

Contact Information

For further information, visit Atmel AVR32.
Support and FAQ: https://www.microchip.com/support/