![]() | CPU Cycle Counter provides an interface to the COUNT and COMPARE registers |
![]() | Compiler abstraction layer and code utilities for 32-bit AVR |
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![]() | This collection of macros identify which series and families that the various Atmel parts belong to |
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![]() | This is a driver for global enabling and disabling of interrupts |
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![]() | MPU driver that allows the user to divide the memory space into different protection regions |
![]() | GPIO gives access to the MCU pins |
![]() | This is a software module to register interrupt handlers at any specified interrupt level to any interrupt line managed by the INTC module in AVR UC3 devices |
![]() | The Power Manager (PM) provides synchronous clocks to the CPU and the modules and peripherals connected to the HSB and PBx buses |
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![]() | This is a stub on the AVR UC3 Power Manager(PM) for the sleepmgr service |
![]() | FLASHCDW interfaces a flash block with the 32-bit internal HSB bus |
![]() | Driver for the SCIF (System Control Interface) |
![]() | This driver adds functionality to print debug strings and data through a dedicated USART |
![]() | Driver for the USART (Universal Synchronous Asynchronous Receiver Transmitter) |
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![]() ![]() | A Digital Frequency Locked Loop can be used to generate a highly accurate frequency from a slower-running reference clock, in much the same way as a PLL |
![]() ![]() | Generic clocks are configurable clocks which run outside the system clock domain |
![]() ![]() | This group contains functions and definitions related to configuring and enabling/disabling on-chip oscillators |
![]() ![]() | See Quick Start Guide for the System Clock Management service (UC3L) |
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![]() | The generic board support module includes board-specific definitions and function prototypes, such as the board initialization function |