conf_clock.h File Reference

Clock configuration.

Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.

Macros
#define	CONFIG_DFLL0_DIV   0
#define	CONFIG_DFLL0_MUL   (EXAMPLE_TARGET_DFLL_FREQ_HZ / GC_SRC_FREQ_HZ)
#define	CONFIG_DFLL0_SOURCE   GENCLK_SRC_RCSYS
#define	CONFIG_SYSCLK_CPU_DIV   3
#define	CONFIG_SYSCLK_PBA_DIV   3
#define	CONFIG_SYSCLK_PBB_DIV   3
#define	CONFIG_SYSCLK_SOURCE   SYSCLK_SRC_DFLL
#define	EXAMPLE_TARGET_DFLL_FREQ_HZ   96000000
#define	EXAMPLE_TARGET_MCUCLK_FREQ_HZ   12000000
#define	EXAMPLE_TARGET_PBACLK_FREQ_HZ   12000000
#define	FPBA   EXAMPLE_TARGET_PBACLK_FREQ_HZ
#define	GC_SRC_FREQ_HZ   AVR32_SCIF_RCOSC_FREQUENCY

#define CONFIG_DFLL0_DIV   0

Referenced by dfll_enable_config_defaults().

#define CONFIG_DFLL0_MUL   (EXAMPLE_TARGET_DFLL_FREQ_HZ / GC_SRC_FREQ_HZ)

Referenced by dfll_enable_config_defaults().

#define CONFIG_DFLL0_SOURCE   GENCLK_SRC_RCSYS

Referenced by dfll_enable_config_defaults().

#define CONFIG_SYSCLK_CPU_DIV   3

Referenced by sysclk_init().

#define CONFIG_SYSCLK_PBA_DIV   3

Referenced by sysclk_init().

#define CONFIG_SYSCLK_PBB_DIV   3

Referenced by sysclk_init().

#define CONFIG_SYSCLK_SOURCE   SYSCLK_SRC_DFLL

Referenced by sysclk_init().

#define EXAMPLE_TARGET_DFLL_FREQ_HZ   96000000

#define EXAMPLE_TARGET_MCUCLK_FREQ_HZ   12000000

#define EXAMPLE_TARGET_PBACLK_FREQ_HZ   12000000

#define FPBA   EXAMPLE_TARGET_PBACLK_FREQ_HZ

Referenced by main().

#define GC_SRC_FREQ_HZ   AVR32_SCIF_RCOSC_FREQUENCY