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CPU - PM - Power Manager

The Power Manager (PM) provides synchronous clocks to the CPU and the modules and peripherals connected to the HSB and PBx buses.

The PM also contains advanced power-saving features and a Reset Controller.

Modules

 Power Clocks Library
 

Macros

#define PM_NOT_SUPPORTED   (-10000)
 Define "not supported" for the power manager features. More...
 
#define PM_POLL_TIMEOUT   100000
 The timeguard used for polling (expressed in ticks). More...
 
#define PM_UNLOCK(reg)   (AVR32_PM.unlock = (unsigned long)(AVR32_PM_UNLOCK_KEY_VALUE << AVR32_PM_UNLOCK_KEY_OFFSET)|(reg))
 Unlock PM register macro. More...
 

Enumerations

enum  pm_clk_domain_t {
  PM_CLK_DOMAIN_0 = AVR32_PM_CLK_GRP_CPU,
  PM_CLK_DOMAIN_1 = AVR32_PM_CLK_GRP_HSB,
  PM_CLK_DOMAIN_2 = AVR32_PM_CLK_GRP_PBA,
  PM_CLK_DOMAIN_3 = AVR32_PM_CLK_GRP_PBB,
  PM_CLK_DOMAIN_INVALID
}
 The clock domains of the power manager. More...
 
enum  pm_clk_src_t {
  PM_CLK_SRC_SLOW = AVR32_PM_MCSEL_SLOW,
  PM_CLK_SRC_OSC0 = AVR32_PM_MCSEL_OSC0,
  PM_CLK_SRC_DFLL0 = AVR32_PM_MCSEL_DFLL0,
  PM_CLK_SRC_RC120M = AVR32_PM_MCSEL_RC120M,
  PM_CLK_SRC_INVALID
}
 Device-specific data. More...
 
enum  pm_divratio_max_t {
  PM_CPUSEL_DIVRATIO_MAX = AVR32_PM_CPUSEL_CPUSEL_MASK >> AVR32_PM_CPUSEL_CPUSEL_OFFSET,
  PM_HSBSEL_DIVRATIO_MAX = AVR32_PM_HSBSEL_HSBSEL_MASK >> AVR32_PM_HSBSEL_HSBSEL_OFFSET,
  PM_PBASEL_DIVRATIO_MAX = AVR32_PM_PBASEL_PBSEL_MASK >> AVR32_PM_PBASEL_PBSEL_OFFSET,
  PM_PBBSEL_DIVRATIO_MAX = AVR32_PM_PBBSEL_PBSEL_MASK >> AVR32_PM_PBBSEL_PBSEL_OFFSET
}
 The maximum synchronous clock division ratio for each clock domain. More...
 
enum  pm_divratio_t {
  PM_CKSEL_DIVRATIO_2 = 0,
  PM_CKSEL_DIVRATIO_4,
  PM_CKSEL_DIVRATIO_8,
  PM_CKSEL_DIVRATIO_16,
  PM_CKSEL_DIVRATIO_32,
  PM_CKSEL_DIVRATIO_64,
  PM_CKSEL_DIVRATIO_128,
  PM_CKSEL_DIVRATIO_256,
  PM_CKSEL_DIVRATIO_ERROR
}
 The possible synchronous clock division ratio. More...
 

Clock Functions

long pm_set_mclk_source (pm_clk_src_t src)
 Set the main clock. More...
 
long pm_config_mainclk_safety (bool cfd, bool ocp, bool final)
 Configure the main clock safety mechanisms. More...
 
long pm_set_clk_domain_div (pm_clk_domain_t clock_domain, pm_divratio_t divratio)
 Set the division ratio for a clock domain. More...
 
long pm_disable_clk_domain_div (pm_clk_domain_t clock_domain)
 Disable the division ratio for a clock domain. More...
 
void pm_set_all_cksel (unsigned long main_clock_f_hz, unsigned long cpu_f_hz, unsigned long pba_f_hz, unsigned long pbb_f_hz)
 Enable or Disable the division ratio for each clock domain depending on the main source clock frequency and each clock domain target frequency. More...
 
long pm_wait_for_clk_ready (void)
 Wait actively for the clock settings to be effective. More...
 

Module Functions

long pm_enable_module (unsigned long module)
 Enable the clock of a module. More...
 
long pm_disable_module (unsigned long module)
 Disable the clock of a module. More...
 

Sleep Functions

static __always_inline
unsigned long 
pm_get_wake_cause (void)
 Returns MCU wake cause. More...
 
static __always_inline void pm_asyn_wake_up_enable (unsigned long awen_mask)
 Enable one or several asynchronous wake-up source. More...
 
static __always_inline void pm_asyn_wake_up_disable (unsigned long awen_mask)
 Disable one or several asynchronous wake-up sources. More...
 
#define SLEEP(sleep_mode)   {__asm__ __volatile__ ("sleep "STRINGZ(sleep_mode));}
 Sets the MCU in the specified sleep mode. More...
 

Reset Functions

static __always_inline
unsigned long 
pm_get_reset_cause (void)
 Returns MCU last reset cause. More...
 

Interrupt Functions

static __always_inline void pm_enable_interrupts (unsigned long mask)
 Enable power manager interrupts. More...
 
static __always_inline void pm_disable_interrupts (unsigned long mask)
 Disable power manager interrupts. More...
 
static __always_inline
unsigned long 
pm_get_enabled_interrupts (void)
 Read the enabled power manager interrupts. More...
 
static __always_inline
unsigned long 
pm_get_interrupts_status (void)
 Read the interrupts status of the power manager. More...
 
static __always_inline void pm_clear_interrupt_status (unsigned long mask)
 Clear raised interrupts from the power manager. More...
 

Misc Functions

static __always_inline
unsigned long 
pm_get_status (void)
 Get the PM status. More...
 

#define PM_NOT_SUPPORTED   (-10000)

Define "not supported" for the power manager features.

#define PM_POLL_TIMEOUT   100000

The timeguard used for polling (expressed in ticks).

Referenced by pm_wait_for_clk_ready().

#define PM_UNLOCK (   reg)    (AVR32_PM.unlock = (unsigned long)(AVR32_PM_UNLOCK_KEY_VALUE << AVR32_PM_UNLOCK_KEY_OFFSET)|(reg))
#define SLEEP (   sleep_mode)    {__asm__ __volatile__ ("sleep "STRINGZ(sleep_mode));}

Sets the MCU in the specified sleep mode.

Note
Precautions should be taken before entering sleep mode. Refer to the datasheet chapter 'Power Manager'.
Parameters
sleep_modeThe sleep mode index

Referenced by main(), and pm_sleep().

The clock domains of the power manager.

Enumerator
PM_CLK_DOMAIN_0 
PM_CLK_DOMAIN_1 
PM_CLK_DOMAIN_2 
PM_CLK_DOMAIN_3 
PM_CLK_DOMAIN_INVALID 

Device-specific data.

The clock sources of the power manager.

Enumerator
PM_CLK_SRC_SLOW 
PM_CLK_SRC_OSC0 
PM_CLK_SRC_DFLL0 
PM_CLK_SRC_RC120M 
PM_CLK_SRC_INVALID 

The maximum synchronous clock division ratio for each clock domain.

Enumerator
PM_CPUSEL_DIVRATIO_MAX 
PM_HSBSEL_DIVRATIO_MAX 
PM_PBASEL_DIVRATIO_MAX 
PM_PBBSEL_DIVRATIO_MAX 

The possible synchronous clock division ratio.

Enumerator
PM_CKSEL_DIVRATIO_2 
PM_CKSEL_DIVRATIO_4 
PM_CKSEL_DIVRATIO_8 
PM_CKSEL_DIVRATIO_16 
PM_CKSEL_DIVRATIO_32 
PM_CKSEL_DIVRATIO_64 
PM_CKSEL_DIVRATIO_128 
PM_CKSEL_DIVRATIO_256 
PM_CKSEL_DIVRATIO_ERROR 

static __always_inline void pm_asyn_wake_up_disable ( unsigned long  awen_mask)
static

Disable one or several asynchronous wake-up sources.

Parameters
awen_maskMask of asynchronous wake-up sources (use one of the defines AVR32_PM_AWEN_xxxxWEN_MASK in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/)
static __always_inline void pm_asyn_wake_up_enable ( unsigned long  awen_mask)
static

Enable one or several asynchronous wake-up source.

Parameters
awen_maskMask of asynchronous wake-up sources (use one of the defines AVR32_PM_AWEN_xxxxWEN_MASK in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/)
static __always_inline void pm_clear_interrupt_status ( unsigned long  mask)
static

Clear raised interrupts from the power manager.

Parameters
maskThe interrupts to clear.
long pm_config_mainclk_safety ( bool  cfd,
bool  ocp,
bool  final 
)

Configure the main clock safety mechanisms.

Note
Refer to the section Clock Failure Detector of the PM chapter in the datasheet
Warning
The Critical Path Oscillator (CRIPOSC) must be enabled before enabling the Over Clock Protection mechanism.
Parameters
cfdEnable/disable the Clock Failure Detection mechanism
ocpEnable/disable the Over Clock Protection mechanism
finalIf true, make this configuration definitive
Returns
Status.
Return values
=0Success.
<0An error occurred.

References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, u_avr32_pm_cfdctrl_t::cfdctrl, u_avr32_pm_cfdctrl_t::CFDCTRL, PASS, and PM_UNLOCK.

long pm_disable_clk_domain_div ( pm_clk_domain_t  clock_domain)

Disable the division ratio for a clock domain.

Parameters
clock_domainThe clock domain to alter.
Warning
Care should be taken that each new frequency of the synchronous clocks does not exceed the maximum frequency for each clock domain.
Returns
Status.
Return values
=0Success.
<0An error occurred.

References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, u_avr32_pm_cpusel_t::cpusel, u_avr32_pm_cpusel_t::CPUSEL, DISABLE, PASS, and PM_UNLOCK.

Referenced by pm_set_all_cksel().

static __always_inline void pm_disable_interrupts ( unsigned long  mask)
static

Disable power manager interrupts.

Parameters
maskthe interrupts to disable.
long pm_disable_module ( unsigned long  module)

Disable the clock of a module.

Parameters
moduleThe module to shut down (use one of the defines in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
Returns
Status.
Return values
0Success.
<0An error occurred.

References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, PASS, and PM_UNLOCK.

static __always_inline void pm_enable_interrupts ( unsigned long  mask)
static

Enable power manager interrupts.

Parameters
maskthe interrupts to enable.
long pm_enable_module ( unsigned long  module)

Enable the clock of a module.

Parameters
moduleThe module to clock (use one of the defines in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
Returns
Status.
Return values
0Success.
<0An error occurred.

Enable the clock of a module.

References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, PASS, and PM_UNLOCK.

static __always_inline unsigned long pm_get_enabled_interrupts ( void  )
static

Read the enabled power manager interrupts.

Returns
mask of the enabled interrupts.
static __always_inline unsigned long pm_get_interrupts_status ( void  )
static

Read the interrupts status of the power manager.

Returns
mask of the interrupts that have been triggered.
static __always_inline unsigned long pm_get_reset_cause ( void  )
static

Returns MCU last reset cause.

Returns
The MCU last reset cause which can be masked with the AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes.
static __always_inline unsigned long pm_get_status ( void  )
static

Get the PM status.

Returns
The content of the PM Status register.
static __always_inline unsigned long pm_get_wake_cause ( void  )
static

Returns MCU wake cause.

Returns
The MCU wake cause which can be masked with the AVR32_PM_WCAUSE_x_MASK bit-masks to isolate specific causes.
void pm_set_all_cksel ( unsigned long  main_clock_f_hz,
unsigned long  cpu_f_hz,
unsigned long  pba_f_hz,
unsigned long  pbb_f_hz 
)

Enable or Disable the division ratio for each clock domain depending on the main source clock frequency and each clock domain target frequency.

Parameters
main_clock_f_hzThe main source clock frequency
cpu_f_hzThe target CPU clock domain frequency
pba_f_hzThe target PBA clock domain frequency
pbb_f_hzThe target PBB clock domain frequency
Warning
Care should be taken that each new frequency of the synchronous clocks does not exceed the maximum frequency for each clock domain.

References PM_CKSEL_DIVRATIO_ERROR, pm_disable_clk_domain_div(), pm_find_divratio(), and pm_set_clk_domain_div().

Referenced by pcl_configure_synchronous_clocks().

long pm_set_clk_domain_div ( pm_clk_domain_t  clock_domain,
pm_divratio_t  divratio 
)

Set the division ratio for a clock domain.

Parameters
clock_domainThe clock domain to alter.
divratioThe division ratio to set.
Warning
Care should be taken that each new frequency of the synchronous clocks does not exceed the maximum frequency for each clock domain.
Returns
Status.
Return values
=0Success.
<0An error occurred.

References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, u_avr32_pm_cpusel_t::cpusel, u_avr32_pm_cpusel_t::CPUSEL, PASS, PM_CPUSEL_DIVRATIO_MAX, and PM_UNLOCK.

Referenced by pm_set_all_cksel().

long pm_set_mclk_source ( pm_clk_src_t  src)

Set the main clock.

Parameters
srcThe clock to use as the main clock.
Warning
The input clock to use as the main clock must be enabled before calling this function, otherwise a deadlock will occur.
Returns
Status.
Return values
0Success.
<0An error occurred when trying to set the main clock.

Set the main clock.

References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, PASS, and PM_UNLOCK.

Referenced by pcl_configure_synchronous_clocks(), and pcl_switch_to_osc().

long pm_wait_for_clk_ready ( void  )

Wait actively for the clock settings to be effective.

Note
To avoid an infinite loop, this function checks the clock ready flag PM_POLL_TIMEOUT times.
Returns
Status.
Return values
0Success.
<0Unable to reach a clock ready status within the polling limit.

References PASS, and PM_POLL_TIMEOUT.