Chip-specific system clock manager configuration.
Copyright (c) 2011-2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
#define | CONFIG_DFLL0_DIV 1 |
#define | CONFIG_DFLL0_MUL (48000000UL / OSC_RCSYS_NOMINAL_HZ) |
#define | CONFIG_DFLL0_SOURCE GENCLK_SRC_RCSYS |
#define | CONFIG_SYSCLK_CPU_DIV 0 |
#define | CONFIG_SYSCLK_INIT_CPUMASK 0 |
#define | CONFIG_SYSCLK_INIT_HSBMASK 0 |
#define | CONFIG_SYSCLK_INIT_PBAMASK 0 |
#define | CONFIG_SYSCLK_INIT_PBBMASK 0 |
#define | CONFIG_SYSCLK_PBA_DIV 0 |
#define | CONFIG_SYSCLK_PBB_DIV 0 |
#define | CONFIG_SYSCLK_SOURCE SYSCLK_SRC_DFLL |
#define CONFIG_DFLL0_DIV 1 |
Referenced by dfll_enable_config_defaults().
#define CONFIG_DFLL0_MUL (48000000UL / OSC_RCSYS_NOMINAL_HZ) |
Referenced by dfll_enable_config_defaults().
#define CONFIG_DFLL0_SOURCE GENCLK_SRC_RCSYS |
Referenced by dfll_enable_config_defaults().
#define CONFIG_SYSCLK_CPU_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_CPUMASK 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_HSBMASK 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_PBAMASK 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_PBBMASK 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBA_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBB_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_DFLL |
Referenced by sysclk_init().