Data Structures | |
| union | aic23b_aapc_t |
| Register structure. More... | |
| struct | aic23b_ctrl_t |
| Register structure. More... | |
| union | aic23b_daif_t |
| Register structure. More... | |
| union | aic23b_dapc_t |
| Register structure. More... | |
| union | aic23b_dia_t |
| Register structure. More... | |
| union | aic23b_lchvc_t |
| Register structure. More... | |
| union | aic23b_llicvc_t |
| Register structure. More... | |
| union | aic23b_pdc_t |
| Register structure. More... | |
| union | aic23b_rchvc_t |
| Register structure. More... | |
| union | aic23b_rlicvc_t |
| Register structure. More... | |
| union | aic23b_rr_t |
| Register structure. More... | |
| union | aic23b_src_t |
| Register structure. More... | |
Macros | |
Control Interface | |
| #define | AIC23B_CTRL_INTERFACE_TWI 1 |
| Control interface: Two-Wire Interface. More... | |
| #define | AIC23B_CTRL_INTERFACE_SPI 2 |
| Control interface: Serial Peripheral Interface. More... | |
Mode Supported | |
| #define | AIC23B_MODE_DAC 0 |
| Mode supported: DAC. More... | |
| #define | AIC23B_MODE_ADC 1 |
| Mode supported: ADC. More... | |
| #define | AIC23B_MODE_CODEC 3 |
| Mode supported: CODEC. More... | |
Input Selected | |
| #define | AIC23B_INPUT_LINE 0 |
| Input Selected: LINE IN. More... | |
| #define | AIC23B_INPUT_MIC 1 |
| Input Selected: MIC. More... | |
Control Word | |
| #define | AIC23B_CTRL_SIZE (AIC23B_CTRL_ADDR_SIZE + AIC23B_CTRL_DATA_SIZE) |
| #define | AIC23B_CTRL_ADDR_OFFSET 9 |
| Control address bit-field offset. More... | |
| #define | AIC23B_CTRL_ADDR_SIZE 7 |
| Control address bit-field size. More... | |
| #define | AIC23B_CTRL_DATA_OFFSET 0 |
| Control data bit-field offset. More... | |
| #define | AIC23B_CTRL_DATA_SIZE 9 |
| Control data bit-field size. More... | |
Left Line Input Channel Volume Control | |
| #define | AIC23B_LLICVC 0x00 |
| Register index. More... | |
| #define | AIC23B_LLICVC_ADDRESS 0x00 |
| Register address. More... | |
| #define | AIC23B_LLICVC_DEFAULT 0x0097 |
| Register default value. More... | |
| #define | AIC23B_LLICVC_LRS_OFFSET 8 |
| Left/right line simultaneous volume/mute update bit-field offset. More... | |
| #define | AIC23B_LLICVC_LRS_SIZE 1 |
| Left/right line simultaneous volume/mute update bit-field size. More... | |
| #define | AIC23B_LLICVC_LIM_OFFSET 7 |
| Left line input mute bit-field offset. More... | |
| #define | AIC23B_LLICVC_LIM_SIZE 1 |
| Left line input mute bit-field size. More... | |
| #define | AIC23B_LLICVC_LIV_OFFSET 0 |
| Left line input volume control bit-field offset. More... | |
| #define | AIC23B_LLICVC_LIV_SIZE 5 |
| Left line input volume control bit-field size. More... | |
Right Line Input Channel Volume Control | |
| #define | AIC23B_RLICVC 0x01 |
| Register index. More... | |
| #define | AIC23B_RLICVC_ADDRESS 0x01 |
| Register address. More... | |
| #define | AIC23B_RLICVC_DEFAULT 0x0097 |
| Register default value. More... | |
| #define | AIC23B_RLICVC_RLS_OFFSET 8 |
| Right/left line simultaneous volume/mute update bit-field offset. More... | |
| #define | AIC23B_RLICVC_RLS_SIZE 1 |
| Right/left line simultaneous volume/mute update bit-field size. More... | |
| #define | AIC23B_RLICVC_RIM_OFFSET 7 |
| Right line input mute bit-field offset. More... | |
| #define | AIC23B_RLICVC_RIM_SIZE 1 |
| Right line input mute bit-field size. More... | |
| #define | AIC23B_RLICVC_RIV_OFFSET 0 |
| Right line input volume control bit-field offset. More... | |
| #define | AIC23B_RLICVC_RIV_SIZE 5 |
| Right line input volume control bit-field size. More... | |
Left Channel Headphone Volume Control | |
| #define | AIC23B_LCHVC 0x02 |
| Register index. More... | |
| #define | AIC23B_LCHVC_ADDRESS 0x02 |
| Register address. More... | |
| #define | AIC23B_LCHVC_DEFAULT 0x00F9 |
| Register default value. More... | |
| #define | AIC23B_LCHVC_LRS_OFFSET 8 |
| Left/right headphone channel simultaneous volume/mute update bit-field offset. More... | |
| #define | AIC23B_LCHVC_LRS_SIZE 1 |
| Left/right headphone channel simultaneous volume/mute update bit-field size. More... | |
| #define | AIC23B_LCHVC_LZC_OFFSET 7 |
| Left-channel zero-cross detect bit-field offset. More... | |
| #define | AIC23B_LCHVC_LZC_SIZE 1 |
| Left-channel zero-cross detect bit-field size. More... | |
| #define | AIC23B_LCHVC_LHV_OFFSET 0 |
| Left headphone volume control bit-field offset. More... | |
| #define | AIC23B_LCHVC_LHV_SIZE 7 |
| Left headphone volume control bit-field size. More... | |
Right Channel Headphone Volume Control | |
| #define | AIC23B_RCHVC 0x03 |
| Register index. More... | |
| #define | AIC23B_RCHVC_ADDRESS 0x03 |
| Register address. More... | |
| #define | AIC23B_RCHVC_DEFAULT 0x00F9 |
| Register default value. More... | |
| #define | AIC23B_RCHVC_RLS_OFFSET 8 |
| Right/left headphone channel simultaneous volume/mute update bit-field offset. More... | |
| #define | AIC23B_RCHVC_RLS_SIZE 1 |
| Right/left headphone channel simultaneous volume/mute update bit-field size. More... | |
| #define | AIC23B_RCHVC_RZC_OFFSET 7 |
| Right-channel zero-cross detect bit-field offset. More... | |
| #define | AIC23B_RCHVC_RZC_SIZE 1 |
| Right-channel zero-cross detect bit-field size. More... | |
| #define | AIC23B_RCHVC_RHV_OFFSET 0 |
| Right headphone volume control bit-field offset. More... | |
| #define | AIC23B_RCHVC_RHV_SIZE 7 |
| Right headphone volume control bit-field size. More... | |
Analog Audio Path Control | |
| #define | AIC23B_AAPC 0x04 |
| Register index. More... | |
| #define | AIC23B_AAPC_ADDRESS 0x04 |
| Register address. More... | |
| #define | AIC23B_AAPC_DEFAULT 0x000A |
| Register default value. More... | |
| #define | AIC23B_AAPC_STA_OFFSET 6 |
| Sidetone addition bit-field offset. More... | |
| #define | AIC23B_AAPC_STA_SIZE 3 |
| Sidetone addition bit-field size. More... | |
| #define | AIC23B_AAPC_STA_M18DB 0x0003 |
| Added sidetone: -18 dB. More... | |
| #define | AIC23B_AAPC_STA_M12DB 0x0002 |
| Added sidetone: -12 dB. More... | |
| #define | AIC23B_AAPC_STA_M9DB 0x0001 |
| Added sidetone: -9 dB. More... | |
| #define | AIC23B_AAPC_STA_M6DB 0x0000 |
| Added sidetone: -6 dB. More... | |
| #define | AIC23B_AAPC_STA_0DB 0x0004 |
| Added sidetone: 0 dB. More... | |
| #define | AIC23B_AAPC_STE_OFFSET 5 |
| Sidetone enable bit-field offset. More... | |
| #define | AIC23B_AAPC_STE_SIZE 1 |
| Sidetone enable bit-field size. More... | |
| #define | AIC23B_AAPC_DAC_OFFSET 4 |
| DAC select bit-field offset. More... | |
| #define | AIC23B_AAPC_DAC_SIZE 1 |
| DAC select bit-field size. More... | |
| #define | AIC23B_AAPC_BYP_OFFSET 3 |
| Bypass bit-field offset. More... | |
| #define | AIC23B_AAPC_BYP_SIZE 1 |
| Bypass bit-field size. More... | |
| #define | AIC23B_AAPC_INSEL_OFFSET 2 |
| Input select for ADC bit-field offset. More... | |
| #define | AIC23B_AAPC_INSEL_SIZE 1 |
| Input select for ADC bit-field size. More... | |
| #define | AIC23B_AAPC_INSEL_LINE 0x0000 |
| Input selected for ADC: line. More... | |
| #define | AIC23B_AAPC_INSEL_MIC 0x0001 |
| Input selected for ADC: microphone. More... | |
| #define | AIC23B_AAPC_MICM_OFFSET 1 |
| Microphone mute bit-field offset. More... | |
| #define | AIC23B_AAPC_MICM_SIZE 1 |
| Microphone mute bit-field size. More... | |
| #define | AIC23B_AAPC_MICB_OFFSET 0 |
| Microphone boost (+20 dB) bit-field offset. More... | |
| #define | AIC23B_AAPC_MICB_SIZE 1 |
| Microphone boost (+20 dB) bit-field size. More... | |
Digital Audio Path Control | |
| #define | AIC23B_DAPC 0x05 |
| Register index. More... | |
| #define | AIC23B_DAPC_ADDRESS 0x05 |
| Register address. More... | |
| #define | AIC23B_DAPC_DEFAULT 0x0008 |
| Register default value. More... | |
| #define | AIC23B_DAPC_DACM_OFFSET 3 |
| DAC soft mute bit-field offset. More... | |
| #define | AIC23B_DAPC_DACM_SIZE 1 |
| DAC soft mute bit-field size. More... | |
| #define | AIC23B_DAPC_DEEMP_OFFSET 1 |
| De-emphasis control bit-field offset. More... | |
| #define | AIC23B_DAPC_DEEMP_SIZE 2 |
| De-emphasis control bit-field size. More... | |
| #define | AIC23B_DAPC_DEEMP_NONE 0x0000 |
| De-emphasis: none. More... | |
| #define | AIC23B_DAPC_DEEMP_32KHZ 0x0001 |
| De-emphasis: 32 kHz. More... | |
| #define | AIC23B_DAPC_DEEMP_44_1KHZ 0x0002 |
| De-emphasis: 44.1 kHz. More... | |
| #define | AIC23B_DAPC_DEEMP_48KHZ 0x0003 |
| De-emphasis: 48 kHz. More... | |
| #define | AIC23B_DAPC_ADCHP_OFFSET 0 |
| ADC high-pass filter bit-field offset. More... | |
| #define | AIC23B_DAPC_ADCHP_SIZE 1 |
| ADC high-pass filter bit-field size. More... | |
Power Down Control | |
| #define | AIC23B_PDC 0x06 |
| Register index. More... | |
| #define | AIC23B_PDC_ADDRESS 0x06 |
| Register address. More... | |
| #define | AIC23B_PDC_DEFAULT 0x0007 |
| Register default value. More... | |
| #define | AIC23B_PDC_OFF_OFFSET 7 |
| Device power bit-field offset. More... | |
| #define | AIC23B_PDC_OFF_SIZE 1 |
| Device power bit-field size. More... | |
| #define | AIC23B_PDC_CLK_OFFSET 6 |
| Clock bit-field offset. More... | |
| #define | AIC23B_PDC_CLK_SIZE 1 |
| Clock bit-field size. More... | |
| #define | AIC23B_PDC_OSC_OFFSET 5 |
| Oscillator bit-field offset. More... | |
| #define | AIC23B_PDC_OSC_SIZE 1 |
| Oscillator bit-field size. More... | |
| #define | AIC23B_PDC_OUT_OFFSET 4 |
| Outputs bit-field offset. More... | |
| #define | AIC23B_PDC_OUT_SIZE 1 |
| Outputs bit-field size. More... | |
| #define | AIC23B_PDC_DAC_OFFSET 3 |
| DAC bit-field offset. More... | |
| #define | AIC23B_PDC_DAC_SIZE 1 |
| DAC bit-field size. More... | |
| #define | AIC23B_PDC_ADC_OFFSET 2 |
| ADC bit-field offset. More... | |
| #define | AIC23B_PDC_ADC_SIZE 1 |
| ADC bit-field size. More... | |
| #define | AIC23B_PDC_MIC_OFFSET 1 |
| Microphone input bit-field offset. More... | |
| #define | AIC23B_PDC_MIC_SIZE 1 |
| Microphone input bit-field size. More... | |
| #define | AIC23B_PDC_LINE_OFFSET 0 |
| Line input bit-field offset. More... | |
| #define | AIC23B_PDC_LINE_SIZE 1 |
| Line input bit-field size. More... | |
Digital Audio Interface Format | |
| #define | AIC23B_DAIF 0x07 |
| Register index. More... | |
| #define | AIC23B_DAIF_ADDRESS 0x07 |
| Register address. More... | |
| #define | AIC23B_DAIF_DEFAULT 0x0001 |
| Register default value. More... | |
| #define | AIC23B_DAIF_MS_OFFSET 6 |
| Master/slave mode bit-field offset. More... | |
| #define | AIC23B_DAIF_MS_SIZE 1 |
| Master/slave mode bit-field size. More... | |
| #define | AIC23B_DAIF_MS_SLAVE 0x0000 |
| Slave mode. More... | |
| #define | AIC23B_DAIF_MS_MASTER 0x0001 |
| Master mode. More... | |
| #define | AIC23B_DAIF_LRSWAP_OFFSET 5 |
| DAC left/right swap bit-field offset. More... | |
| #define | AIC23B_DAIF_LRSWAP_SIZE 1 |
| DAC left/right swap bit-field size. More... | |
| #define | AIC23B_DAIF_LRP_OFFSET 4 |
| DAC left/right phase bit-field offset. More... | |
| #define | AIC23B_DAIF_LRP_SIZE 1 |
| DAC left/right phase bit-field size. More... | |
| #define | AIC23B_DAIF_IWL_OFFSET 2 |
| Input bit length bit-field offset. More... | |
| #define | AIC23B_DAIF_IWL_SIZE 2 |
| Input bit length bit-field size. More... | |
| #define | AIC23B_DAIF_IWL_16 0x0000 |
| Input bit length: 16. More... | |
| #define | AIC23B_DAIF_IWL_20 0x0001 |
| Input bit length: 20. More... | |
| #define | AIC23B_DAIF_IWL_24 0x0002 |
| Input bit length: 24. More... | |
| #define | AIC23B_DAIF_IWL_32 0x0003 |
| Input bit length: 32. More... | |
| #define | AIC23B_DAIF_FMT_OFFSET 0 |
| Data format bit-field offset. More... | |
| #define | AIC23B_DAIF_FMT_SIZE 2 |
| Data format bit-field size. More... | |
| #define | AIC23B_DAIF_FMT_RA 0x0000 |
| Data format: MSB first, right aligned. More... | |
| #define | AIC23B_DAIF_FMT_LA 0x0001 |
| Data format: MSB first, left aligned. More... | |
| #define | AIC23B_DAIF_FMT_I2S 0x0002 |
| Data format: I2S format, MSB first, left - 1 aligned. More... | |
| #define | AIC23B_DAIF_FMT_DSP 0x0003 |
| Data format: DSP format, frame sync followed by two data words. More... | |
Sample Rate Control | |
| #define | AIC23B_SRC 0x08 |
| Register index. More... | |
| #define | AIC23B_SRC_ADDRESS 0x08 |
| Register address. More... | |
| #define | AIC23B_SRC_DEFAULT 0x0020 |
| Register default value. More... | |
| #define | AIC23B_SRC_CLKOUT_OFFSET 7 |
| Clock output divider bit-field offset. More... | |
| #define | AIC23B_SRC_CLKOUT_SIZE 1 |
| Clock output divider bit-field size. More... | |
| #define | AIC23B_SRC_CLKIN_OFFSET 6 |
| Clock input divider bit-field offset. More... | |
| #define | AIC23B_SRC_CLKIN_SIZE 1 |
| Clock input divider bit-field size. More... | |
| #define | AIC23B_SRC_SR_OFFSET 2 |
| Sampling rate control bit-field offset. More... | |
| #define | AIC23B_SRC_SR_SIZE 4 |
| Sampling rate control bit-field size. More... | |
| #define | AIC23B_SRC_BOSR_OFFSET 1 |
| Base oversampling rate bit-field offset. More... | |
| #define | AIC23B_SRC_BOSR_SIZE 1 |
| Base oversampling rate bit-field size. More... | |
| #define | AIC23B_SRC_USB_OFFSET 0 |
| USB clock mode select bit-field offset. More... | |
| #define | AIC23B_SRC_USB_SIZE 1 |
| USB clock mode select bit-field size. More... | |
Digital Interface Activation | |
| #define | AIC23B_DIA 0x09 |
| Register index. More... | |
| #define | AIC23B_DIA_ADDRESS 0x09 |
| Register address. More... | |
| #define | AIC23B_DIA_DEFAULT 0x0000 |
| Register default value. More... | |
| #define | AIC23B_DIA_ACT_OFFSET 0 |
| Activate interface bit-field offset. More... | |
| #define | AIC23B_DIA_ACT_SIZE 1 |
| Activate interface bit-field size. More... | |
Reset Register | |
| #define | AIC23B_RR 0x0A |
| Register index. More... | |
| #define | AIC23B_RR_ADDRESS 0x0F |
| Register address. More... | |
| #define | AIC23B_RR_DEFAULT 0x0000 |
| Register default value. More... | |
| #define | AIC23B_RR_RES_OFFSET 0 |
| Reset bit-field offset. More... | |
| #define | AIC23B_RR_RES_SIZE 9 |
| Reset bit-field size. More... | |
Register Structure | |
| #define | AIC23B_ADDRESS(REG) REG##_ADDRESS |
Returns the address of the REG register (e.g. AIC23B_LLICVC). More... | |
| #define | AIC23B_DEFAULT(REG) REG##_DEFAULT |
Returns the default value of the REG register (e.g. AIC23B_LLICVC). More... | |
| #define | AIC23B_OFFSET(REG, BITFIELD) REG##_##BITFIELD##_OFFSET |
| Returns the offset of the BITFIELD bit-field (e.g. More... | |
| #define | AIC23B_SIZE(REG, BITFIELD) REG##_##BITFIELD##_SIZE |
| Returns the size of the BITFIELD bit-field (e.g. More... | |
| #define | AIC23B_MASK(REG, BITFIELD) (((1 << REG##_##BITFIELD##_SIZE) - 1) << REG##_##BITFIELD##_OFFSET) |
| Returns the mask of the BITFIELD bit-field (e.g. More... | |
Audio Channels | |
| #define | AIC23B_LEFT_CHANNEL 0x01 |
| #define | AIC23B_RIGHT_CHANNEL 0x02 |
Volume Control | |
| #define | AIC23B_MUTED SCHAR_MIN |
| #define | AIC23B_LIN_VOL_OFFSET 0x17 |
| #define | AIC23B_LIN_VOL_MIN ((int8_t)(-34.5 * 2 / 3)) |
| #define | AIC23B_LIN_VOL_MAX ((int8_t)(+12 * 2 / 3)) |
| #define | AIC23B_HP_VOL_OFFSET 0x79 |
| #define | AIC23B_HP_VOL_MIN ((int8_t)(-72)) |
| #define | AIC23B_HP_VOL_MAX ((int8_t)(+ 6)) |
Functions | |
Low-Level Interface | |
| uint16_t | aic23b_read_reg (uint8_t reg) |
| Reads the reg register. More... | |
| void | aic23b_write_reg (uint8_t reg, uint16_t val) |
| Writes val to the reg register. More... | |
Mid-Level Interface | |
| int8_t | aic23b_get_line_in_volume (uint8_t ch) |
| Gets the ch line input channel volume. More... | |
| void | aic23b_set_line_in_volume (uint8_t ch_mask, int8_t vol) |
| Sets the ch_mask line input channels volume to vol. More... | |
| uint8_t | aic23b_dac_get_average_headphone_volume (void) |
| Gets the average headphone volume. More... | |
| void | aic23b_dac_set_average_headphone_volume (uint8_t volume) |
| Sets the average headphone volume. More... | |
| bool | aic23b_dac_is_headphone_volume_muted (void) |
| Returns the state of the mute mode of the DAC. More... | |
| bool | aic23b_dac_is_headphone_volume_boosted (void) |
| Returns the state of the boost mode of the DAC. More... | |
| int8_t | aic23b_get_headphone_volume (uint8_t ch) |
| Gets the ch channel headphone volume. More... | |
| void | aic23b_set_headphone_volume (uint8_t ch_mask, int8_t vol, bool z_cross) |
Sets the ch_mask channels headphone volume to vol, with zero-cross detect if z_cross is true. More... | |
| aic23b_aapc_t | aic23b_get_analog_audio_path (void) |
| Gets the analog audio path. More... | |
| void | aic23b_set_analog_audio_path (aic23b_aapc_t aapc) |
| Sets the analog audio path to aapc. More... | |
| aic23b_dapc_t | aic23b_get_digital_audio_path (void) |
| Gets the digital audio path. More... | |
| void | aic23b_set_digital_audio_path (aic23b_dapc_t dapc) |
| Sets the digital audio path to dapc. More... | |
| aic23b_pdc_t | aic23b_get_power_down_state (void) |
| Gets the power down state. More... | |
| void | aic23b_set_power_down_state (aic23b_pdc_t pdc) |
| Sets the power down state to pdc. More... | |
| bool | aic23b_is_dig_audio_activated (void) |
| Tells whether the digital audio interface is activated. More... | |
| void | aic23b_activate_dig_audio (bool act) |
| Activates or deactivates the digital audio interface according to act. More... | |
| void | aic23b_reset (void) |
| Resets the CODEC. More... | |
| void | aic23b_configure_freq (int master_clock_hz, int sample_rate_hz) |
| Used to configure the codec frequency. More... | |
High-Level Interface | |
| void | aic23b_dac_start (uint32_t sample_rate_hz, uint8_t num_channels, uint8_t bits_per_sample, bool swap_channels, void(*callback)(uint32_t arg), uint32_t callback_opt, uint32_t pba_hz) |
| Starts the DAC. More... | |
| void | aic23b_dac_setup (uint32_t sample_rate_hz, uint8_t num_channels, uint8_t bits_per_sample, bool swap_channels, void(*callback)(uint32_t arg), uint32_t callback_opt, uint32_t pba_hz) |
| Sets the DAC up with new settings. More... | |
| bool | aic23b_dac_output (void *sample_buffer, size_t sample_length) |
| Outputs a sample buffer to the DAC. More... | |
| void | aic23b_dac_increase_volume (void) |
| Increases the output volume of the DAC. More... | |
| void | aic23b_dac_decrease_volume (void) |
| Decreases the output volume of the DAC. More... | |
| void | aic23b_dac_flush (void) |
| Flushes the sample buffer being output to the DAC. More... | |
| void | aic23b_dac_stop (void) |
| Stops the DAC. More... | |
| void | aic23b_adc_start (uint32_t sample_rate_hz, uint8_t num_channels, uint8_t bits_per_sample, bool swap_channels, void(*callback)(uint32_t arg), uint32_t callback_opt, uint32_t pba_hz) |
| Starts the ADC. More... | |
| void | aic23b_adc_setup (uint32_t sample_rate_hz, uint8_t num_channels, uint8_t bits_per_sample, bool swap_channels, void(*callback)(uint32_t arg), uint32_t callback_opt, uint32_t pba_hz) |
| Sets the ADC up with new settings. More... | |
| bool | aic23b_adc_input (void *sample_buffer, size_t sample_length) |
| Input a sample buffer from the ADC. More... | |
| void | aic23b_adc_flush (void) |
| Flushes the sample buffer being input from the ADC. More... | |
| void | aic23b_adc_stop (void) |
| Stops the ADC. More... | |
| void | aic23b_codec_start (uint32_t sample_rate_hz, uint8_t num_channels, uint8_t bits_per_sample, bool swap_channels, void(*callback)(uint32_t arg), uint32_t callback_opt, uint32_t pba_hz) |
| Starts the CODEC. More... | |
| void | aic23b_codec_setup (uint32_t sample_rate_hz, uint8_t num_channels, uint8_t bits_per_sample, bool swap_channels, void(*callback)(uint32_t arg), uint32_t callback_opt, uint32_t pba_hz) |
| Sets the CODEC up with new settings. More... | |
| void | aic23b_codec_flush (void) |
| Flushes the sample buffers being input from the ADC and output to the DAC. More... | |
| void | aic23b_codec_stop (void) |
| Stops the CODEC. More... | |
| void | aic23b_dac_mute (bool mute) |
| Mute audio if mute is set to true. More... | |
1.8.5