Spi Master configuration.
Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
#define | CONFIG_SPI_MASTER_BITS_PER_TRANSFER 8 |
Default Config Spi Master Bits per Transfer Definition. More... | |
#define | CONFIG_SPI_MASTER_DELAY_BCS 0 |
Default Config Spi Master Delay BCS Delay Between Chip Selects of the SPI. More... | |
#define | CONFIG_SPI_MASTER_DELAY_BCT 0 |
Default Config Spi Master Delay BCT Delay Between Consecutive Transfer on a Chip Selects of the SPI. More... | |
#define | CONFIG_SPI_MASTER_DELAY_BS 0 |
Default Config Spi Master Delay BS Delay Before SPCK on a Chip Selects of the SPI. More... | |
#define | CONFIG_SPI_MASTER_DUMMY 0xFF |
Default Config Spi Master Dummy Field. More... | |
#define CONFIG_SPI_MASTER_BITS_PER_TRANSFER 8 |
Default Config Spi Master Bits per Transfer Definition.
Referenced by spi_master_setup_device().
#define CONFIG_SPI_MASTER_DELAY_BCS 0 |
Default Config Spi Master Delay BCS Delay Between Chip Selects of the SPI.
Referenced by spi_master_init().
#define CONFIG_SPI_MASTER_DELAY_BCT 0 |
Default Config Spi Master Delay BCT Delay Between Consecutive Transfer on a Chip Selects of the SPI.
Referenced by spi_master_setup_device().
#define CONFIG_SPI_MASTER_DELAY_BS 0 |
Default Config Spi Master Delay BS Delay Before SPCK on a Chip Selects of the SPI.
Referenced by spi_master_setup_device().
#define CONFIG_SPI_MASTER_DUMMY 0xFF |
Default Config Spi Master Dummy Field.
Referenced by spi_read_packet().