This module contains WINC3400 ASIC specific internal APIs.
Copyright (c) 2017-2019 Microchip Technology Inc. and its subsidiaries.
#include "common/include/nm_common.h"
#include "driver/source/nmbus.h"
#include "bsp/include/nm_bsp.h"
#include "driver/source/nmasic.h"
#include "driver/include/m2m_types.h"
Macros | |
#define | CLOCKS_EN_REG (0x13) |
#define | CORT_HOST_COMM (0x14) |
#define | GET_UINT32(X, Y) (X[0+Y] + ((uint32)X[1+Y]<<8) + ((uint32)X[2+Y]<<16) +((uint32)X[3+Y]<<24)) |
#define | HOST_CORT_COMM (0x0e) |
#define | NMI_GLB_RESET_0 (NMI_PERIPH_REG_BASE + 0x400) |
#define | NMI_INTR_ENABLE (NMI_INTR_REG_BASE) |
#define | NMI_INTR_REG_BASE (NMI_PERIPH_REG_BASE + 0xa00) |
#define | NMI_PIN_MUX_0 (NMI_PERIPH_REG_BASE + 0x408) |
#define | rBT_CHIP_ID_REG (0x3b0000) |
#define | TIMEOUT (2000) |
#define | WAKE_CLK_REG (0x1) |
#define | WAKEUP_TRIALS (4) |
Functions | |
sint8 | chip_apply_conf (uint32 u32Conf) |
sint8 | chip_deinit (void) |
void | chip_idle (void) |
sint8 | chip_reset (void) |
sint8 | chip_reset_and_cpu_halt (void) |
sint8 | chip_sleep (void) |
sint8 | chip_wake (void) |
sint8 | cpu_start (void) |
sint8 | enable_interrupts (void) |
void | enable_rf_blocks (void) |
sint8 | get_gpio_val (uint8 gpio, uint8 *val) |
uint32 | nmi_get_chipid (void) |
sint8 | nmi_get_mac_address (uint8 *pu8MacAddr) |
sint8 | nmi_get_otp_mac_address (uint8 *pu8MacAddr, uint8 *pu8IsValid) |
uint32 | nmi_get_rfrevid (void) |
void | nmi_set_sys_clk_src_to_xo (void) |
void | nmi_update_pll (void) |
sint8 | pullup_ctrl (uint32 pinmask, uint8 enable) |
void | restore_pmu_settings_after_global_reset (void) |
sint8 | set_gpio_dir (uint8 gpio, uint8 dir) |
sint8 | set_gpio_val (uint8 gpio, uint8 val) |
sint8 | wait_for_bootrom (uint8 arg) |
sint8 | wait_for_firmware_start (uint8 arg) |
#define CLOCKS_EN_REG (0x13) |
Referenced by chip_wake().
#define CORT_HOST_COMM (0x14) |
Referenced by chip_sleep().
#define GET_UINT32 | ( | X, | |
Y | |||
) | (X[0+Y] + ((uint32)X[1+Y]<<8) + ((uint32)X[2+Y]<<16) +((uint32)X[3+Y]<<24)) |
#define HOST_CORT_COMM (0x0e) |
Referenced by chip_sleep(), and chip_wake().
#define NMI_GLB_RESET_0 (NMI_PERIPH_REG_BASE + 0x400) |
Referenced by chip_deinit(), chip_reset(), chip_reset_and_cpu_halt(), and cpu_start().
#define NMI_INTR_ENABLE (NMI_INTR_REG_BASE) |
Referenced by enable_interrupts().
#define NMI_INTR_REG_BASE (NMI_PERIPH_REG_BASE + 0xa00) |
#define NMI_PIN_MUX_0 (NMI_PERIPH_REG_BASE + 0x408) |
Referenced by chip_reset_and_cpu_halt(), and enable_interrupts().
#define rBT_CHIP_ID_REG (0x3b0000) |
Referenced by nmi_get_chipid().
#define TIMEOUT (2000) |
Referenced by wait_for_bootrom(), and wait_for_firmware_start().
#define WAKE_CLK_REG (0x1) |
Referenced by chip_idle(), chip_sleep(), and chip_wake().
#define WAKEUP_TRIALS (4) |
Referenced by chip_wake().
sint8 chip_deinit | ( | void | ) |
stop the firmware, need a re-download
References M2M_DBG, M2M_ERR, M2M_SUCCESS, nm_read_reg_with_ret(), nm_write_reg(), and NMI_GLB_RESET_0.
Referenced by nm_drv_deinit().
void chip_idle | ( | void | ) |
References NBIT1, nm_read_reg_with_ret(), nm_write_reg(), and WAKE_CLK_REG.
Referenced by nm_drv_init_hold().
sint8 chip_reset | ( | void | ) |
References M2M_SUCCESS, nm_bsp_sleep(), nm_write_reg(), NMI_GLB_RESET_0, and restore_pmu_settings_after_global_reset().
Referenced by chip_reset_and_cpu_halt(), and nm_drv_init_hold().
sint8 chip_reset_and_cpu_halt | ( | void | ) |
sint8 chip_sleep | ( | void | ) |
References CORT_HOST_COMM, HOST_CORT_COMM, M2M_SUCCESS, NBIT0, NBIT1, nm_read_reg_with_ret(), nm_write_reg(), and WAKE_CLK_REG.
Referenced by hif_chip_sleep().
sint8 chip_wake | ( | void | ) |
References CLOCKS_EN_REG, HOST_CORT_COMM, M2M_ERR, M2M_ERR_TIME_OUT, M2M_SUCCESS, NBIT0, NBIT1, NBIT2, nm_bsp_sleep(), nm_read_reg_with_ret(), nm_write_reg(), WAKE_CLK_REG, and WAKEUP_TRIALS.
Referenced by chip_reset_and_cpu_halt(), hif_chip_wake(), and nm_drv_init_hold().
sint8 cpu_start | ( | void | ) |
reset regs
Go...
References BOOTROM_REG, M2M_ERR, M2M_ERR_BUS_FAIL, M2M_SUCCESS, NBIT0, nm_bsp_sleep(), nm_read_reg_with_ret(), nm_write_reg(), NMI_GLB_RESET_0, NMI_REV_REG, and NMI_STATE_REG.
Referenced by nm_cpu_start(), and nm_drv_init_start().
sint8 enable_interrupts | ( | void | ) |
interrupt pin mux select
interrupt enable
References M2M_ERR_BUS_FAIL, M2M_SUCCESS, nm_read_reg_with_ret(), nm_write_reg(), NMI_INTR_ENABLE, and NMI_PIN_MUX_0.
Referenced by m2m_wifi_download_mode(), and nm_drv_init_start().
void enable_rf_blocks | ( | void | ) |
References nm_bsp_sleep(), and nm_write_reg().
References M2M_SUCCESS, and nm_read_reg_with_ret().
Referenced by gpio_ioctl().
uint32 nmi_get_chipid | ( | void | ) |
References M2M_SUCCESS, nm_read_reg_with_ret(), and rBT_CHIP_ID_REG.
Referenced by hif_send(), hif_set_rx_done(), m2m_wifi_get_chipId(), nm_drv_init_download_mode(), nm_drv_init_hold(), restore_pmu_settings_after_global_reset(), and wait_for_bootrom().
References m2m_memcpy(), M2M_SUCCESS, nm_read_block(), nm_read_reg_with_ret(), rNMI_GP_REG_0, and tstrGpRegs::u32Mac_efuse_mib.
Referenced by m2m_wifi_get_mac_address().
References EFUSED_MAC, M2M_DBG, m2m_memcpy(), m2m_memset(), M2M_SUCCESS, nm_read_block(), nm_read_reg_with_ret(), rNMI_GP_REG_0, and tstrGpRegs::u32Mac_efuse_mib.
Referenced by m2m_wifi_get_otp_mac_address().
uint32 nmi_get_rfrevid | ( | void | ) |
References M2M_SUCCESS, and nm_read_reg_with_ret().
void nmi_set_sys_clk_src_to_xo | ( | void | ) |
References nm_read_reg(), nm_write_reg(), and nmi_update_pll().
void nmi_update_pll | ( | void | ) |
References nm_read_reg(), and nm_write_reg().
Referenced by nmi_set_sys_clk_src_to_xo().
References M2M_ERR, M2M_SUCCESS, nm_read_reg_with_ret(), and nm_write_reg().
Referenced by m2m_periph_pullup_ctrl().
void restore_pmu_settings_after_global_reset | ( | void | ) |
References nm_write_reg(), nmi_get_chipid(), REV, and REV_2B0.
Referenced by chip_reset().
References M2M_SUCCESS, nm_read_reg_with_ret(), and nm_write_reg().
Referenced by gpio_ioctl().
References M2M_SUCCESS, nm_read_reg_with_ret(), and nm_write_reg().
Referenced by gpio_ioctl().
References BOOTROM_REG, chip_apply_conf(), M2M_ATE_FW_START_VALUE, M2M_DBG, M2M_ERR_INIT, M2M_FINISH_BOOT_ROM, M2M_START_FIRMWARE, M2M_SUCCESS, M2M_WAIT_FOR_HOST_REG, M2M_WIFI_MODE_CONFIG, M2M_WIFI_MODE_ETHERNET, nm_bsp_sleep(), nm_read_reg(), nm_write_reg(), nmi_get_chipid(), NMI_REV_REG, REV, REV_3A0, rHAVE_ETHERNET_MODE_BIT, rHAVE_USE_PMU_BIT, and TIMEOUT.
Referenced by nm_drv_init_start().
References M2M_ATE_FW_START_VALUE, M2M_DBG, M2M_ERR_INIT, M2M_FINISH_INIT_STATE, M2M_SUCCESS, M2M_WIFI_MODE_CONFIG, nm_bsp_sleep(), nm_read_reg(), nm_read_reg_with_ret(), nm_write_reg(), NMI_REV_REG, NMI_STATE_REG, and TIMEOUT.
Referenced by nm_drv_init_start().