conf_winc.h File Reference

SAME70 WINC3400 configuration.

Copyright (c) 2019 Microchip Technology Inc. and its subsidiaries.

#include "board.h"
#include "bsp/include/nm_bsp_same70_app.h"

Macros
#define	CONF_WINC_DEBUG   (1)
#define	CONF_WINC_PIN_CHIP_ENABLE   IOPORT_CREATE_PIN(PIOC, 17)
#define	CONF_WINC_PIN_RESET   IOPORT_CREATE_PIN(PIOA, 19)
	Default settings for SAME70 Xplained. More...
#define	CONF_WINC_PIN_WAKE   IOPORT_CREATE_PIN(PIOC, 31)
#define	CONF_WINC_PRINTF   printf
#define	CONF_WINC_SPI   SPI0
	SPI pin and instance settings. More...
#define	CONF_WINC_SPI_CLK_FLAGS   IOPORT_MODE_MUX_B
#define	CONF_WINC_SPI_CLK_GPIO   PIO_PD22_IDX
#define	CONF_WINC_SPI_CLOCK   (48000000)
	SPI clock: (sysclk_get_cpu_hz() / CONF_WINC_SPI_CLOCK). More...
#define	CONF_WINC_SPI_CS_FLAGS   IOPORT_MODE_MUX_B
#define	CONF_WINC_SPI_CS_GPIO   PIO_PD25_IDX
#define	CONF_WINC_SPI_DLYBCT   (0)
#define	CONF_WINC_SPI_DLYBS   (0)
	SPI delay before SPCK and between consecutive transfer. More...
#define	CONF_WINC_SPI_ID   ID_SPI0
#define	CONF_WINC_SPI_INT_MASK   PIO_PD28
#define	CONF_WINC_SPI_INT_PIN   IOPORT_CREATE_PIN(PIOD, 28)
	SPI interrupt pin. More...
#define	CONF_WINC_SPI_INT_PIO   PIOD
#define	CONF_WINC_SPI_INT_PIO_ID   ID_PIOD
#define	CONF_WINC_SPI_INT_PRIORITY   (0)
#define	CONF_WINC_SPI_MISO_FLAGS   IOPORT_MODE_MUX_B
#define	CONF_WINC_SPI_MISO_GPIO   PIO_PD20_IDX
#define	CONF_WINC_SPI_MOSI_FLAGS   IOPORT_MODE_MUX_B
#define	CONF_WINC_SPI_MOSI_GPIO   PIO_PD21_IDX
#define	CONF_WINC_SPI_NPCS   (1)
#define	CONF_WINC_SPI_PHA   (1)
#define	CONF_WINC_SPI_POL   (0)
	Clock polarity & phase. More...
#define	CONF_WINC_USE_SPI   (1)

#define CONF_WINC_DEBUG   (1)

#define CONF_WINC_PIN_CHIP_ENABLE   IOPORT_CREATE_PIN(PIOC, 17)

Referenced by init_chip_pins(), nm_bsp_deinit(), and nm_bsp_reset().

#define CONF_WINC_PIN_RESET   IOPORT_CREATE_PIN(PIOA, 19)

Default settings for SAME70 Xplained.

Referenced by init_chip_pins(), nm_bsp_deinit(), and nm_bsp_reset().

#define CONF_WINC_PIN_WAKE   IOPORT_CREATE_PIN(PIOC, 31)

Referenced by init_chip_pins().

#define CONF_WINC_PRINTF   printf

#define CONF_WINC_SPI   SPI0

SPI pin and instance settings.

Referenced by nm_bus_deinit(), nm_bus_init(), and spi_rw().

#define CONF_WINC_SPI_CLK_FLAGS   IOPORT_MODE_MUX_B

Referenced by nm_bus_init().

#define CONF_WINC_SPI_CLK_GPIO   PIO_PD22_IDX

Referenced by nm_bus_deinit(), and nm_bus_init().

#define CONF_WINC_SPI_CLOCK   (48000000)

SPI clock: (sysclk_get_cpu_hz() / CONF_WINC_SPI_CLOCK).

Beware of integer division.

Referenced by nm_bus_init().

#define CONF_WINC_SPI_CS_FLAGS   IOPORT_MODE_MUX_B

Referenced by nm_bus_init().

#define CONF_WINC_SPI_CS_GPIO   PIO_PD25_IDX

Referenced by nm_bus_deinit(), nm_bus_init(), and spi_rw().

#define CONF_WINC_SPI_DLYBCT   (0)

Referenced by nm_bus_init().

#define CONF_WINC_SPI_DLYBS   (0)

SPI delay before SPCK and between consecutive transfer.

Referenced by nm_bus_init().

#define CONF_WINC_SPI_ID   ID_SPI0

#define CONF_WINC_SPI_INT_MASK   PIO_PD28

Referenced by chip_isr(), nm_bsp_interrupt_ctrl(), and nm_bsp_register_isr().

#define CONF_WINC_SPI_INT_PIN   IOPORT_CREATE_PIN(PIOD, 28)

SPI interrupt pin.

Referenced by nm_bsp_register_isr().

#define CONF_WINC_SPI_INT_PIO   PIOD

Referenced by nm_bsp_interrupt_ctrl(), and nm_bsp_register_isr().

#define CONF_WINC_SPI_INT_PIO_ID   ID_PIOD

Referenced by chip_isr(), and nm_bsp_register_isr().

#define CONF_WINC_SPI_INT_PRIORITY   (0)

Referenced by nm_bsp_register_isr().

#define CONF_WINC_SPI_MISO_FLAGS   IOPORT_MODE_MUX_B

Referenced by nm_bus_init().

#define CONF_WINC_SPI_MISO_GPIO   PIO_PD20_IDX

Referenced by nm_bus_deinit(), and nm_bus_init().

#define CONF_WINC_SPI_MOSI_FLAGS   IOPORT_MODE_MUX_B

Referenced by nm_bus_init().

#define CONF_WINC_SPI_MOSI_GPIO   PIO_PD21_IDX

Referenced by nm_bus_deinit(), and nm_bus_init().

#define CONF_WINC_SPI_NPCS   (1)

Referenced by nm_bus_init().

#define CONF_WINC_SPI_PHA   (1)

Referenced by nm_bus_init().

#define CONF_WINC_SPI_POL   (0)

Clock polarity & phase.

Referenced by nm_bus_init().

#define CONF_WINC_USE_SPI   (1)