Chip-specific system clock manager configuration.
Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
#define | CONFIG_SYSCLK_CPU_DIV 0 |
#define | CONFIG_SYSCLK_PBA_DIV 0 |
#define | CONFIG_SYSCLK_PBB_DIV 0 |
#define | CONFIG_SYSCLK_PBC_DIV 0 |
#define | CONFIG_SYSCLK_PBD_DIV 0 |
#define | CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS |
#define CONFIG_SYSCLK_CPU_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBA_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBB_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBC_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBD_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCSYS |
Referenced by sysclk_init().