conf_clock.h File Reference

Chip-specific system clock manager configuration.

Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.

Macros
#define	CONFIG_DFLL0_DIV   1 /* Fdfll = (Fclk * DFLL_mul) / DFLL_div */
#define	CONFIG_DFLL0_MUL   (40000000 / FOSC32)
#define	CONFIG_DFLL0_SOURCE   GENCLK_SRC_OSC32K
#define	CONFIG_SYSCLK_CPU_DIV   2 /* Fcpu = Fsys/(2 ^ CPU_div) */
#define	CONFIG_SYSCLK_PBA_DIV   2 /* Fpba = Fsys/(2 ^ PBA_div) */
#define	CONFIG_SYSCLK_PBB_DIV   2 /* Fpbb = Fsys/(2 ^ PBB_div) */
#define	CONFIG_SYSCLK_SOURCE   SYSCLK_SRC_DFLL
#define	CONFIG_USBCLK_DIV   0 /* Fusb = Fsys/(2 ^ USB_div) */
#define	CONFIG_USBCLK_SOURCE   USBCLK_SRC_OSC0

#define CONFIG_DFLL0_DIV   1 /* Fdfll = (Fclk * DFLL_mul) / DFLL_div */

Referenced by dfll_enable_config_defaults().

#define CONFIG_DFLL0_MUL   (40000000 / FOSC32)

Referenced by dfll_enable_config_defaults().

#define CONFIG_DFLL0_SOURCE   GENCLK_SRC_OSC32K

Referenced by dfll_enable_config_defaults().

#define CONFIG_SYSCLK_CPU_DIV   2 /* Fcpu = Fsys/(2 ^ CPU_div) */

Referenced by sysclk_init().

#define CONFIG_SYSCLK_PBA_DIV   2 /* Fpba = Fsys/(2 ^ PBA_div) */

Referenced by sysclk_init().

#define CONFIG_SYSCLK_PBB_DIV   2 /* Fpbb = Fsys/(2 ^ PBB_div) */

Referenced by sysclk_init().

#define CONFIG_SYSCLK_SOURCE   SYSCLK_SRC_DFLL

Referenced by sysclk_init().

#define CONFIG_USBCLK_DIV   0 /* Fusb = Fsys/(2 ^ USB_div) */

#define CONFIG_USBCLK_SOURCE   USBCLK_SRC_OSC0