Generic Clock Management

Generic clocks are configurable clocks which run outside the system clock domain.

They are often connected to peripherals which have an asynchronous component running independently of the bus clock, e.g. USB controllers, low-power timers and RTCs, etc.

Note that not all platforms have support for generic clocks; on such platforms, this API will not be available.

Data Structures
struct	genclk_config
	Hardware representation of a set of generic clock parameters. More...

Enumerations
enum	genclk_source {   GENCLK_PCK_SRC_SLCK_RC = 0,   GENCLK_PCK_SRC_SLCK_XTAL = 1,   GENCLK_PCK_SRC_SLCK_BYPASS = 2,   GENCLK_PCK_SRC_MAINCK_4M_RC = 3,   GENCLK_PCK_SRC_MAINCK_8M_RC = 4,   GENCLK_PCK_SRC_MAINCK_12M_RC = 5,   GENCLK_PCK_SRC_MAINCK_XTAL = 6,   GENCLK_PCK_SRC_MAINCK_BYPASS = 7,   GENCLK_PCK_SRC_PLLACK = 8,   GENCLK_PCK_SRC_MCK = 9 }
	Generic clock source ID. More...

Functions
static void	genclk_config_defaults (struct genclk_config *p_cfg, uint32_t ul_id)
static void	genclk_config_read (struct genclk_config *p_cfg, uint32_t ul_id)
static void	genclk_config_write (const struct genclk_config *p_cfg, uint32_t ul_id)
static void	genclk_disable (uint32_t ul_id)
static void	genclk_enable (const struct genclk_config *p_cfg, uint32_t ul_id)
static void	genclk_enable_config (unsigned int id, enum genclk_source src, unsigned int divider)
	Enable the configuration defined by src and divider for the generic clock identified by id. More...

Generic clock configuration
static void	genclk_enable_source (enum genclk_source e_src)
	Enable the source clock src used by a generic clock. More...

Programmable Clock Identifiers (PCK)
#define	GENCLK_PCK_0   0
	PCK0 ID. More...
#define	GENCLK_PCK_1   1
	PCK1 ID. More...
#define	GENCLK_PCK_2   2
	PCK2 ID. More...

Programmable Clock Prescalers (PCK)
enum	genclk_divider {   GENCLK_PCK_PRES_1 = PMC_PCK_PRES(0),   GENCLK_PCK_PRES_2 = PMC_PCK_PRES(1),   GENCLK_PCK_PRES_4 = PMC_PCK_PRES(2),   GENCLK_PCK_PRES_8 = PMC_PCK_PRES(3),   GENCLK_PCK_PRES_16 = PMC_PCK_PRES(4),   GENCLK_PCK_PRES_32 = PMC_PCK_PRES(5),   GENCLK_PCK_PRES_64 = PMC_PCK_PRES(6) }

Programmable Clock Source and Prescaler configuration
static void	genclk_config_set_source (struct genclk_config *p_cfg, enum genclk_source e_src)
	Select a new source clock src in configuration cfg. More...
static void	genclk_config_set_divider (struct genclk_config *p_cfg, uint32_t e_divider)

Retrieves the current rate in Hz of the Programmable Clock Source
static uint32_t	genclk_get_frequency_hz (uint32_t ul_id)

#define GENCLK_PCK_0   0

PCK0 ID.

#define GENCLK_PCK_1   1

PCK1 ID.

#define GENCLK_PCK_2   2

PCK2 ID.

enum genclk_divider

Enumerator
GENCLK_PCK_PRES_1	Set PCK clock prescaler to 1.
GENCLK_PCK_PRES_2	Set PCK clock prescaler to 2.
GENCLK_PCK_PRES_4	Set PCK clock prescaler to 4.
GENCLK_PCK_PRES_8	Set PCK clock prescaler to 8.
GENCLK_PCK_PRES_16	Set PCK clock prescaler to 16.
GENCLK_PCK_PRES_32	Set PCK clock prescaler to 32.
GENCLK_PCK_PRES_64	Set PCK clock prescaler to 64.

enum genclk_source

Generic clock source ID.

Each generic clock may be generated from a different clock source. These are the available alternatives provided by the chip.

Enumerator
GENCLK_PCK_SRC_SLCK_RC	Internal 32kHz RC oscillator as PCK source clock.
GENCLK_PCK_SRC_SLCK_XTAL	External 32kHz crystal oscillator as PCK source clock.
GENCLK_PCK_SRC_SLCK_BYPASS	External 32kHz bypass oscillator as PCK source clock.
GENCLK_PCK_SRC_MAINCK_4M_RC	Internal 4MHz RC oscillator as PCK source clock.
GENCLK_PCK_SRC_MAINCK_8M_RC	Internal 8MHz RC oscillator as PCK source clock.
GENCLK_PCK_SRC_MAINCK_12M_RC	Internal 12MHz RC oscillator as PCK source clock.
GENCLK_PCK_SRC_MAINCK_XTAL	External crystal oscillator as PCK source clock.
GENCLK_PCK_SRC_MAINCK_BYPASS	External bypass oscillator as PCK source clock.
GENCLK_PCK_SRC_PLLACK	Use PLLACK as PCK source clock.
GENCLK_PCK_SRC_MCK	Use Master Clk as PCK source clock.

static void genclk_config_defaults ( struct genclk_config *  p_cfg, uint32_t  ul_id  )

inlinestatic

References genclk_config::ctrl.

Referenced by genclk_enable_config(), and main().

static void genclk_config_read ( struct genclk_config *  p_cfg, uint32_t  ul_id  )

inlinestatic

References genclk_config::ctrl.

static void genclk_config_set_divider ( struct genclk_config *  p_cfg, uint32_t  e_divider  )

inlinestatic

References genclk_config::ctrl.

Referenced by genclk_enable_config(), and main().

void genclk_config_set_source ( struct genclk_config *  p_cfg, enum genclk_source  e_src  )

inlinestatic

Select a new source clock src in configuration cfg.

References genclk_config::ctrl, GENCLK_PCK_SRC_MAINCK_12M_RC, GENCLK_PCK_SRC_MAINCK_4M_RC, GENCLK_PCK_SRC_MAINCK_8M_RC, GENCLK_PCK_SRC_MAINCK_BYPASS, GENCLK_PCK_SRC_MAINCK_XTAL, GENCLK_PCK_SRC_MCK, GENCLK_PCK_SRC_PLLACK, GENCLK_PCK_SRC_SLCK_BYPASS, GENCLK_PCK_SRC_SLCK_RC, and GENCLK_PCK_SRC_SLCK_XTAL.

Referenced by genclk_enable_config(), and main().

static void genclk_config_write ( const struct genclk_config *  p_cfg, uint32_t  ul_id  )

inlinestatic

References genclk_config::ctrl.

static void genclk_disable ( uint32_t  ul_id )

inlinestatic

References pmc_disable_pck().

static void genclk_enable ( const struct genclk_config *  p_cfg, uint32_t  ul_id  )

inlinestatic

References genclk_config::ctrl, and pmc_enable_pck().

Referenced by genclk_enable_config(), and main().

static void genclk_enable_config ( unsigned int  id, enum genclk_source  src, unsigned int  divider  )

inlinestatic

Enable the configuration defined by src and divider for the generic clock identified by id.

Parameters

id	The ID of the generic clock.
src	The source clock of the generic clock.
divider	The divider used to generate the generic clock.

References genclk_config_defaults(), genclk_config_set_divider(), genclk_config_set_source(), genclk_enable(), and genclk_enable_source().

void genclk_enable_source ( enum genclk_source  e_src )

inlinestatic

Enable the source clock src used by a generic clock.

References Assert, GENCLK_PCK_SRC_MAINCK_12M_RC, GENCLK_PCK_SRC_MAINCK_4M_RC, GENCLK_PCK_SRC_MAINCK_8M_RC, GENCLK_PCK_SRC_MAINCK_BYPASS, GENCLK_PCK_SRC_MAINCK_XTAL, GENCLK_PCK_SRC_MCK, GENCLK_PCK_SRC_PLLACK, GENCLK_PCK_SRC_SLCK_BYPASS, GENCLK_PCK_SRC_SLCK_RC, GENCLK_PCK_SRC_SLCK_XTAL, osc_enable(), osc_is_ready(), OSC_MAINCK_12M_RC, OSC_MAINCK_4M_RC, OSC_MAINCK_8M_RC, OSC_MAINCK_BYPASS, OSC_MAINCK_XTAL, OSC_SLCK_32K_BYPASS, OSC_SLCK_32K_RC, OSC_SLCK_32K_XTAL, osc_wait_ready(), and pll_enable_config_defaults().

Referenced by genclk_enable_config().

static uint32_t genclk_get_frequency_hz ( uint32_t  ul_id )

inlinestatic

References OSC_MAINCK_12M_RC_HZ, OSC_MAINCK_4M_RC_HZ, OSC_MAINCK_8M_RC_HZ, OSC_MAINCK_XTAL_HZ, OSC_SLCK_32K_RC_HZ, OSC_SLCK_32K_XTAL_HZ, PLL_UPLL_HZ, pmc_get_mainck_config(), pmc_get_pllack_config(), pmc_get_slck_config(), pmc_get_upllckdiv_config(), and sysclk_get_main_hz().