Chip-specific system clock manager configuration.
Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
#define | CONFIG_SYSCLK_CPU_DIV 0 /* Fcpu = Fsys/(2 ^ CPU_div) */ |
#define | CONFIG_SYSCLK_PBA_DIV 0 /* Fpba = Fsys/(2 ^ PBA_div) */ |
#define | CONFIG_SYSCLK_PBB_DIV 0 /* Fpbb = Fsys/(2 ^ PBB_div) */ |
#define | CONFIG_SYSCLK_SOURCE SYSCLK_SRC_OSC0 |
#define | CONFIG_USBCLK_DIV 0 /* Fusb = Fsys/(2 ^ USB_div) */ |
#define | CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0 |
#define CONFIG_SYSCLK_CPU_DIV 0 /* Fcpu = Fsys/(2 ^ CPU_div) */ |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBA_DIV 0 /* Fpba = Fsys/(2 ^ PBA_div) */ |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBB_DIV 0 /* Fpbb = Fsys/(2 ^ PBB_div) */ |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_OSC0 |
Referenced by sysclk_init().
#define CONFIG_USBCLK_DIV 0 /* Fusb = Fsys/(2 ^ USB_div) */ |
Referenced by sysclk_enable_usb().
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0 |
Referenced by sysclk_enable_usb().