Microchip® Advanced Software Framework

conf_clock.h File Reference

Example specific clock configuration file.

Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.

Macros

#define CONFIG_PLL0_DIV   4
 Divide by 4 (and multiply by 8) to produce a 64 MHz clock. More...
 
#define CONFIG_PLL0_MUL   8
 Multiply by 8 (and divide by 4) to produce a 64 MHz clock. More...
 
#define CONFIG_PLL0_SOURCE   PLL_SRC_RC32MHZ
 Use the external crystal as PLL source. More...
 
#define CONFIG_RTC_SOURCE   SYSCLK_RTCSRC_ULP
 
#define CONFIG_SYSCLK_PSADIV   SYSCLK_PSADIV_1
 Run the CLKper4 on 64 MHz. More...
 
#define CONFIG_SYSCLK_PSBCDIV   SYSCLK_PSBCDIV_1_2
 Run the CLKper2 on 64 MHz and CLKper on 32 MHz (CPU speed) More...
 
#define CONFIG_SYSCLK_SOURCE   SYSCLK_SRC_PLL
 Use the PLL as system clock source. More...
 

#define CONFIG_PLL0_DIV   4

Divide by 4 (and multiply by 8) to produce a 64 MHz clock.

Referenced by pll_enable_config_defaults().

#define CONFIG_PLL0_MUL   8

Multiply by 8 (and divide by 4) to produce a 64 MHz clock.

Referenced by pll_enable_config_defaults().

#define CONFIG_PLL0_SOURCE   PLL_SRC_RC32MHZ

Use the external crystal as PLL source.

Referenced by pll_enable_config_defaults(), and sysclk_init().

#define CONFIG_RTC_SOURCE   SYSCLK_RTCSRC_ULP

Referenced by sysclk_init().

#define CONFIG_SYSCLK_PSADIV   SYSCLK_PSADIV_1

Run the CLKper4 on 64 MHz.

Referenced by sysclk_get_per4_hz(), and sysclk_init().

#define CONFIG_SYSCLK_PSBCDIV   SYSCLK_PSBCDIV_1_2

Run the CLKper2 on 64 MHz and CLKper on 32 MHz (CPU speed)

Referenced by sysclk_get_per2_hz(), sysclk_get_per_hz(), and sysclk_init().

#define CONFIG_SYSCLK_SOURCE   SYSCLK_SRC_PLL

Use the PLL as system clock source.

Referenced by sysclk_get_main_hz(), and sysclk_init().