Data Structures | |
| union | u_avr32_scif_dfll0conf_t |
| union | u_avr32_scif_dfll0ssg_t |
| union | u_avr32_scif_oscctrl0_t |
| union | u_avr32_scif_oscctrl32_t |
| union | u_avr32_scif_pll0_t |
Macros | |
| #define | SCIF_DFLL_COARSE_MAX (AVR32_SCIF_COARSE_MASK >> AVR32_SCIF_COARSE_OFFSET) |
| #define | SCIF_DFLL_FINE_HALF (1 << (AVR32_SCIF_DFLL0CONF_FINE_SIZE-1)) |
| #define | SCIF_DFLL_FINE_MAX (AVR32_SCIF_FINE_MASK >> AVR32_SCIF_FINE_OFFSET) |
Enumerations | |
| enum | scif_dfll_mode_t { SCIF_DFLL0_MODE_OPENLOOP = 0, SCIF_DFLL0_MODE_CLOSEDLOOP } |
| DFLL Control Functions. More... | |
Functions | |
| long int | scif_configure_osc_crystalmode (scif_osc_t osc, unsigned int fcrystal) |
| Configure an oscillator in crystal mode. More... | |
| long int | scif_configure_osc_extmode (scif_osc_t osc) |
| Configure an external clock as input clock. More... | |
| long int | scif_dfll0_closedloop_configure_and_start (const scif_gclk_opt_t *gc_dfllif_ref_opt, unsigned long long target_freq_hz, bool enable_ssg) |
| Depending on the target frequency, compute the DFLL configuration parameters and start the DFLL0 in closed loop mode. More... | |
| long int | scif_dfll0_closedloop_start (const scif_dfll_closedloop_conf_t *pdfllconfig) |
| Configure and start the DFLL0 in closed loop mode. More... | |
| long int | scif_dfll0_openloop_start (const scif_dfll_openloop_conf_t *pdfllconfig) |
| Configure and start the DFLL0 in open loop mode. More... | |
| long int | scif_dfll0_openloop_start_auto (unsigned long TargetFreqkHz) |
| Automatic configuration and start of the DFLL0 in open loop mode. More... | |
| long int | scif_dfll0_openloop_stop (void) |
| Stop the DFLL0 in open loop mode. More... | |
| long int | scif_dfll0_openloop_updatefreq (const scif_dfll_openloop_conf_t *pdfllconfig) |
| Update the frequency of the DFLL0 in open loop mode. More... | |
| long int | scif_dfll0_ssg_enable (scif_dfll_ssg_conf_t *pssg_conf) |
| Configure and enable the SSG. More... | |
| void | scif_disable_rc32out (void) |
| Un-force the RC32 signal from being output on the dedicated pin (PA20) More... | |
| long int | scif_enable_osc (scif_osc_t osc, unsigned int startup, bool wait_for_ready) |
| Enable an oscillator with a given startup time. More... | |
| long int | scif_gc_enable (unsigned int gclk) |
| Enable a generic clock. More... | |
| long int | scif_gc_setup (unsigned int gclk, scif_gcctrl_oscsel_t clk_src, unsigned int diven, unsigned int divfactor) |
| Setup a generic clock. More... | |
| bool | scif_is_osc_ready (scif_osc_t osc) |
| Is an oscillator stable and ready to be used as clock source? More... | |
| long int | scif_pclksr_statushigh_wait (unsigned long statusMask) |
| Backup Registers Functions. More... | |
| long int | scif_pll0_disable (void) |
| long int | scif_pll0_enable (void) |
| long int | scif_pll0_setup (const scif_pll_opt_t *opt) |
| Calibration Functions. More... | |
| long int | scif_start_gclk (unsigned int gclk, const scif_gclk_opt_t *opt) |
| Generic Clock Functions. More... | |
| long int | scif_start_osc (scif_osc_t osc, const scif_osc_opt_t *opt, bool wait_for_ready) |
| Interrupt Functions. More... | |
| long int | scif_start_osc32 (const scif_osc32_opt_t *opt, bool wait_for_ready) |
| OSC32 Functions. More... | |
| void | scif_start_rc120M (void) |
| 120MHz RCosc Functions More... | |
| void | scif_start_rc32k (void) |
| 32kHz internal RCosc (RC32K) Functions More... | |
| long int | scif_stop_gclk (unsigned int gclk) |
| Stop a generic clock. More... | |
| long int | scif_stop_osc (scif_osc_t osc) |
| Stop an oscillator. More... | |
| long | scif_stop_osc32 () |
| Stop the OSC32 oscillator. More... | |
| void | scif_stop_rc120M (void) |
| Stop the 120MHz internal RCosc (RC120M) clock. More... | |
| void | scif_stop_rc32k (void) |
| Stop the 32kHz internal RCosc (RC32K) clock. More... | |
| long int | scif_wait_for_pll0_locked (void) |
| #define SCIF_DFLL_COARSE_MAX (AVR32_SCIF_COARSE_MASK >> AVR32_SCIF_COARSE_OFFSET) |
Referenced by scif_dfll0_openloop_start_auto().
| #define SCIF_DFLL_FINE_HALF (1 << (AVR32_SCIF_DFLL0CONF_FINE_SIZE-1)) |
Referenced by scif_dfll0_openloop_start_auto().
| #define SCIF_DFLL_FINE_MAX (AVR32_SCIF_FINE_MASK >> AVR32_SCIF_FINE_OFFSET) |
Referenced by scif_dfll0_openloop_start_auto().
| enum scif_dfll_mode_t |
| long int scif_pll0_disable | ( | void | ) |
| long int scif_pll0_enable | ( | void | ) |
References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, ENABLE, u_avr32_scif_pll0_t::PLL0, and SCIF_UNLOCK.
Referenced by sysclk_auto_init().
| long int scif_pll0_setup | ( | const scif_pll_opt_t * | opt | ) |
Calibration Functions.
Critical Path Oscillator Functions PLL0 Functions
References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, u_avr32_scif_pll0_t::PLL0, and SCIF_UNLOCK.
Referenced by sysclk_auto_init().
| long int scif_wait_for_pll0_locked | ( | void | ) |
Referenced by sysclk_auto_init().
1.8.5