USB Device Driver for USBHS.

Compliant with common UDD driver.

#include "compiler.h"
#include "preprocessor.h"

Data Structures
struct	sam_uotghs_dmach_t
	Structure for DMA registers in a channel. More...

struct	sam_uotghs_dmadesc_t
	Structure for DMA descriptor. More...

struct	uotghs_dma_control_t
	Structure for DMA control register. More...

struct	uotghs_dma_nextdesc_t
	Access points to the USBHS device DMA memory map with arrayed registers. More...

struct	uotghs_dma_status_t
	Structure for DMA status register. More...

Macros
#define	USBHS_DEVEPTCFG_EPDIR_Pos 8

#define	USBHS_RAM_ADDR 0xA0100000u

USBHS Device IP properties
These macros give access to IP properties
#define	udd_get_endpoint_max_nbr() (9)
	Get maximal number of endpoints. More...

#define	UDD_MAX_PEP_NB (udd_get_endpoint_max_nbr() + 1)

#define	udd_get_endpoint_bank_max_nbr(ep) ((ep == 0) ? 1 : (( ep <= 2) ? 3 : 2))
	Get maximal number of banks of endpoints. More...

#define	udd_get_endpoint_size_max(ep) (((ep) == 0) ? 64 : 1024)
	Get maximal size of endpoint (3X, 1024/64) More...

#define	Is_udd_endpoint_dma_supported(ep) ((((ep) >= 1) && ((ep) <= 7)) ? true : false)
	Get DMA support of endpoints. More...

#define	Is_udd_endpoint_high_bw_supported(ep) (((ep) >= 2) ? true : false)
	Get High Band Width support of endpoints. More...

USBHS Device speeds management
#define	udd_low_speed_enable() (Set_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_LS))
	Enable/disable device low-speed mode. More...

#define	udd_low_speed_disable() (Clr_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_LS))

#define	Is_udd_low_speed_enable() (Tst_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_LS))
	Test if device low-speed mode is forced. More...

#define	udd_high_speed_enable() do { } while (0)

#define	udd_high_speed_disable() do { } while (0)

#define	Is_udd_full_speed_mode() true

USBHS device attach control
These macros manage the USBHS Device attach.
#define	udd_detach_device() (Set_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_DETACH))
	Detaches from USB bus. More...

#define	udd_attach_device() (Clr_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_DETACH))
	Attaches to USB bus. More...

#define	Is_udd_detached() (Tst_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_DETACH))
	Test if the device is detached. More...

USBHS device bus events control
These macros manage the USBHS Device bus events.
#define	udd_initiate_remote_wake_up() (Set_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_RMWKUP))
	Initiates a remote wake-up event. More...

#define	Is_udd_pending_remote_wake_up() (Tst_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_RMWKUP))


#define	udd_enable_remote_wake_up_interrupt() (USBHS->USBHS_DEVIER = USBHS_DEVIER_UPRSMES)
	Manage upstream resume event (=remote wakeup) The USB driver sends a resume signal called "Upstream Resume". More...

#define	udd_disable_remote_wake_up_interrupt() (USBHS->USBHS_DEVIDR = USBHS_DEVIDR_UPRSMEC)

#define	Is_udd_remote_wake_up_interrupt_enabled() (Tst_bits(USBHS->USBHS_DEVIMR, USBHS_DEVIMR_UPRSME))

#define	udd_ack_remote_wake_up_start() (USBHS->USBHS_DEVICR = USBHS_DEVICR_UPRSMC)

#define	udd_raise_remote_wake_up_start() (USBHS->USBHS_DEVIFR = USBHS_DEVIFR_UPRSMS)

#define	Is_udd_remote_wake_up_start() (Tst_bits(USBHS->USBHS_DEVISR, USBHS_DEVISR_UPRSM))


#define	udd_enable_resume_interrupt() (USBHS->USBHS_DEVIER = USBHS_DEVIER_EORSMES)
	Manage downstream resume event (=remote wakeup from host) The USB controller detects a valid "End of Resume" signal initiated by the host. More...

#define	udd_disable_resume_interrupt() (USBHS->USBHS_DEVIDR = USBHS_DEVIDR_EORSMEC)

#define	Is_udd_resume_interrupt_enabled() (Tst_bits(USBHS->USBHS_DEVIMR, USBHS_DEVIMR_EORSME))

#define	udd_ack_resume() (USBHS->USBHS_DEVICR = USBHS_DEVICR_EORSMC)

#define	udd_raise_resume() (USBHS->USBHS_DEVIFR = USBHS_DEVIFR_EORSMS)

#define	Is_udd_resume() (Tst_bits(USBHS->USBHS_DEVISR, USBHS_DEVISR_EORSM))


#define	udd_enable_wake_up_interrupt() (USBHS->USBHS_DEVIER = USBHS_DEVIER_WAKEUPES)
	Manage wake-up event (=usb line activity) The USB controller is reactivated by a filtered non-idle signal from the lines. More...

#define	udd_disable_wake_up_interrupt() (USBHS->USBHS_DEVIDR = USBHS_DEVIDR_WAKEUPEC)

#define	Is_udd_wake_up_interrupt_enabled() (Tst_bits(USBHS->USBHS_DEVIMR, USBHS_DEVIMR_WAKEUPE))

#define	udd_ack_wake_up() (USBHS->USBHS_DEVICR = USBHS_DEVICR_WAKEUPC)

#define	udd_raise_wake_up() (USBHS->USBHS_DEVIFR = USBHS_DEVIFR_WAKEUPS)

#define	Is_udd_wake_up() (Tst_bits(USBHS->USBHS_DEVISR, USBHS_DEVISR_WAKEUP))


#define	udd_enable_reset_interrupt() (USBHS->USBHS_DEVIER = USBHS_DEVIER_EORSTES)
	Manage reset event Set when a USB "End of Reset" has been detected. More...

#define	udd_disable_reset_interrupt() (USBHS->USBHS_DEVIDR = USBHS_DEVIDR_EORSTEC)

#define	Is_udd_reset_interrupt_enabled() (Tst_bits(USBHS->USBHS_DEVIMR, USBHS_DEVIMR_EORSTE))

#define	udd_ack_reset() (USBHS->USBHS_DEVICR = USBHS_DEVICR_EORSTC)

#define	udd_raise_reset() (USBHS->USBHS_DEVIFR = USBHS_DEVIFR_EORSTS)

#define	Is_udd_reset() (Tst_bits(USBHS->USBHS_DEVISR, USBHS_DEVISR_EORST))


#define	udd_enable_sof_interrupt() (USBHS->USBHS_DEVIER = USBHS_DEVIER_SOFES)
	Manage start of frame event. More...

#define	udd_disable_sof_interrupt() (USBHS->USBHS_DEVIDR = USBHS_DEVIDR_SOFEC)

#define	Is_udd_sof_interrupt_enabled() (Tst_bits(USBHS->USBHS_DEVIMR, USBHS_DEVIMR_SOFE))

#define	udd_ack_sof() (USBHS->USBHS_DEVICR = USBHS_DEVICR_SOFC)

#define	udd_raise_sof() (USBHS->USBHS_DEVIFR = USBHS_DEVIFR_SOFS)

#define	Is_udd_sof() (Tst_bits(USBHS->USBHS_DEVISR, USBHS_DEVISR_SOF))

#define	udd_frame_number() (Rd_bitfield(USBHS->USBHS_DEVFNUM, USBHS_DEVFNUM_FNUM_Msk))

#define	Is_udd_frame_number_crc_error() (Tst_bits(USBHS->USBHS_DEVFNUM, USBHS_DEVFNUM_FNCERR))


#define	udd_enable_msof_interrupt() (USBHS->USBHS_DEVIER = USBHS_DEVIER_MSOFES)
	Manage Micro start of frame event (High Speed Only) More...

#define	udd_disable_msof_interrupt() (USBHS->USBHS_DEVIDR = USBHS_DEVIDR_MSOFEC)

#define	Is_udd_msof_interrupt_enabled() (Tst_bits(USBHS->USBHS_DEVIMR, USBHS_DEVIMR_MSOFE))

#define	udd_ack_msof() (USBHS->USBHS_DEVICR = USBHS_DEVIMR_MSOFE)

#define	udd_raise_msof() (USBHS->USBHS_DEVIFR = USBHS_DEVIFR_MSOFS)

#define	Is_udd_msof() (Tst_bits(USBHS->USBHS_DEVISR, USBHS_DEVISR_MSOF))

#define	udd_micro_frame_number() (Rd_bitfield(USBHS->USBHS_DEVFNUM, (USBHS_DEVFNUM_FNUM_Msk\|USBHS_DEVFNUM_MFNUM_Msk)))


#define	udd_enable_suspend_interrupt() (USBHS->USBHS_DEVIER = USBHS_DEVIER_SUSPES)
	Manage suspend event. More...

#define	udd_disable_suspend_interrupt() (USBHS->USBHS_DEVIDR = USBHS_DEVIDR_SUSPEC)

#define	Is_udd_suspend_interrupt_enabled() (Tst_bits(USBHS->USBHS_DEVIMR, USBHS_DEVIMR_SUSPE))

#define	udd_ack_suspend() (USBHS->USBHS_DEVICR = USBHS_DEVICR_SUSPC)

#define	udd_raise_suspend() (USBHS->USBHS_DEVIFR = USBHS_DEVIFR_SUSPS)

#define	Is_udd_suspend() (Tst_bits(USBHS->USBHS_DEVISR, USBHS_DEVISR_SUSP))

USBHS device address control
These macros manage the USBHS Device address.
#define	udd_enable_address() (Set_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_ADDEN))
	enables USB device address More...

#define	udd_disable_address() (Clr_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_ADDEN))
	disables USB device address More...

#define	Is_udd_address_enabled() (Tst_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_ADDEN))

#define	udd_configure_address(addr) (Wr_bitfield(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_UADD_Msk, addr))
	configures the USB device address More...

#define	udd_get_configured_address() (Rd_bitfield(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_UADD_Msk))
	gets the currently configured USB device address More...

USBHS Device endpoint drivers
These macros manage the common features of the endpoints.
#define	USBHS_ARRAY(reg, index) ((&(USBHS->reg))[(index)])
	Generic macro for USBHS registers that can be arrayed. More...

USBHS Device endpoint configuration
#define	udd_enable_endpoint(ep) (Set_bits(USBHS->USBHS_DEVEPT, USBHS_DEVEPT_EPEN0 << (ep)))
	enables the selected endpoint More...

#define	udd_disable_endpoint(ep) (Clr_bits(USBHS->USBHS_DEVEPT, USBHS_DEVEPT_EPEN0 << (ep)))
	disables the selected endpoint More...

#define	Is_udd_endpoint_enabled(ep) (Tst_bits(USBHS->USBHS_DEVEPT, USBHS_DEVEPT_EPEN0 << (ep)))
	tests if the selected endpoint is enabled More...

#define	udd_reset_endpoint(ep)
	resets the selected endpoint More...

#define	Is_udd_resetting_endpoint(ep) (Tst_bits(USBHS->USBHS_DEVEPT, USBHS_DEVEPT_EPRST0 << (ep)))
	Tests if the selected endpoint is being reset. More...

#define	udd_configure_endpoint_type(ep, type) (Wr_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPTYPE_Msk, type))
	Configures the selected endpoint type. More...

#define	udd_get_endpoint_type(ep) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPTYPE_Msk))
	Gets the configured selected endpoint type. More...

#define	udd_enable_endpoint_bank_autoswitch(ep) (Set_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_AUTOSW))
	Enables the bank autoswitch for the selected endpoint. More...

#define	udd_disable_endpoint_bank_autoswitch(ep) (Clr_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_AUTOSW))
	Disables the bank autoswitch for the selected endpoint. More...

#define	Is_udd_endpoint_bank_autoswitch_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_AUTOSW))

#define	udd_configure_endpoint_direction(ep, dir) (Wr_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPDIR, dir))
	Configures the selected endpoint direction. More...

#define	udd_get_endpoint_direction(ep) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPDIR))
	Gets the configured selected endpoint direction. More...

#define	Is_udd_endpoint_in(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPDIR))

#define	udd_format_endpoint_size(size) (32 - clz(((uint32_t)min(max(size, 8), 1024) << 1) - 1) - 1 - 3)
	Bounds given integer size to allowed range and rounds it up to the nearest available greater size, then applies register format of USBHS controller for endpoint size bit-field. More...

#define	udd_configure_endpoint_size(ep, size) (Wr_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPSIZE_Msk, udd_format_endpoint_size(size)))
	Configures the selected endpoint size. More...

#define	udd_get_endpoint_size(ep) (8 << Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPSIZE_Msk))
	Gets the configured selected endpoint size. More...

#define	udd_configure_endpoint_bank(ep, bank) (Wr_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPBK_Msk, bank))
	Configures the selected endpoint number of banks. More...

#define	udd_get_endpoint_bank(ep) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPBK_Msk)+1)
	Gets the configured selected endpoint number of banks. More...

#define	udd_allocate_memory(ep) (Set_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_ALLOC))
	Allocates the configuration selected endpoint in DPRAM memory. More...

#define	udd_unallocate_memory(ep) (Clr_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_ALLOC))
	un-allocates the configuration selected endpoint in DPRAM memory More...

#define	Is_udd_memory_allocated(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_ALLOC))

#define	udd_configure_endpoint(ep, type, dir, size, bank)
	Configures selected endpoint in one step. More...

#define	Is_udd_endpoint_configured(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_CFGOK))
	Tests if current endpoint is configured. More...

#define	udd_control_direction() (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTISR[0], EP_CONTROL), USBHS_DEVEPTISR_CTRLDIR))
	Returns the control direction. More...

#define	udd_reset_data_toggle(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_RSTDTS)
	Resets the data toggle sequence. More...

#define	Is_udd_data_toggle_reset(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_RSTDT))
	Tests if the data toggle sequence is being reset. More...

#define	udd_data_toggle(ep) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_DTSEQ_Msk))
	Returns data toggle. More...

USBHS Device control endpoint interrupts
These macros control the endpoints interrupts.
#define	udd_enable_endpoint_interrupt(ep) (USBHS->USBHS_DEVIER = USBHS_DEVIER_PEP_0 << (ep))
	Enables the selected endpoint interrupt. More...

#define	udd_disable_endpoint_interrupt(ep) (USBHS->USBHS_DEVIDR = USBHS_DEVIDR_PEP_0 << (ep))
	Disables the selected endpoint interrupt. More...

#define	Is_udd_endpoint_interrupt_enabled(ep) (Tst_bits(USBHS->USBHS_DEVIMR, USBHS_DEVIMR_PEP_0 << (ep)))
	Tests if the selected endpoint interrupt is enabled. More...

#define	Is_udd_endpoint_interrupt(ep) (Tst_bits(USBHS->USBHS_DEVISR, USBHS_DEVISR_PEP_0 << (ep)))
	Tests if an interrupt is triggered by the selected endpoint. More...

#define	udd_get_interrupt_endpoint_number()
	Returns the lowest endpoint number generating an endpoint interrupt or MAX_PEP_NB if none. More...

#define	USBHS_DEVISR_PEP_Pos 12

#define	USBHS_DEVIMR_PEP_Pos 12

USBHS Device control endpoint errors
These macros control the endpoint errors.
#define	udd_enable_stall_handshake(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_STALLRQS)
	Enables the STALL handshake. More...

#define	udd_disable_stall_handshake(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_STALLRQC)
	Disables the STALL handshake. More...

#define	Is_udd_endpoint_stall_requested(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_STALLRQ))
	Tests if STALL handshake request is running. More...

#define	Is_udd_stall(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_STALLEDI))
	Tests if STALL sent. More...

#define	udd_ack_stall(ep) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_STALLEDIC)
	ACKs STALL sent. More...

#define	udd_raise_stall(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_STALLEDIS)
	Raises STALL sent. More...

#define	udd_enable_stall_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_STALLEDES)
	Enables STALL sent interrupt. More...

#define	udd_disable_stall_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_STALLEDEC)
	Disables STALL sent interrupt. More...

#define	Is_udd_stall_interrupt_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_STALLEDE))
	Tests if STALL sent interrupt is enabled. More...

#define	Is_udd_nak_out(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_NAKOUTI))
	Tests if NAK OUT received. More...

#define	udd_ack_nak_out(ep) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_NAKOUTIC)
	ACKs NAK OUT received. More...

#define	udd_raise_nak_out(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_NAKOUTIS)
	Raises NAK OUT received. More...

#define	udd_enable_nak_out_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_NAKOUTES)
	Enables NAK OUT interrupt. More...

#define	udd_disable_nak_out_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_NAKOUTEC)
	Disables NAK OUT interrupt. More...

#define	Is_udd_nak_out_interrupt_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_NAKOUTE))
	Tests if NAK OUT interrupt is enabled. More...

#define	Is_udd_nak_in(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_NAKINI))
	Tests if NAK IN received. More...

#define	udd_ack_nak_in(ep) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_NAKINIC)
	ACKs NAK IN received. More...

#define	udd_raise_nak_in(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_NAKINIS)
	Raises NAK IN received. More...

#define	udd_enable_nak_in_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_NAKINES)
	Enables NAK IN interrupt. More...

#define	udd_disable_nak_in_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_NAKINEC)
	Disables NAK IN interrupt. More...

#define	Is_udd_nak_in_interrupt_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_NAKINE))
	Tests if NAK IN interrupt is enabled. More...

#define	udd_ack_overflow_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_OVERFIC)
	ACKs endpoint isochronous overflow interrupt. More...

#define	udd_raise_overflow_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_OVERFIS)
	Raises endpoint isochronous overflow interrupt. More...

#define	Is_udd_overflow(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_OVERFI))
	Tests if an overflow occurs. More...

#define	udd_enable_overflow_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_OVERFES)
	Enables overflow interrupt. More...

#define	udd_disable_overflow_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_OVERFEC)
	Disables overflow interrupt. More...

#define	Is_udd_overflow_interrupt_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_OVERFE))
	Tests if overflow interrupt is enabled. More...

#define	udd_ack_underflow_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_UNDERFIC)
	ACKs endpoint isochronous underflow interrupt. More...

#define	udd_raise_underflow_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_UNDERFIS)
	Raises endpoint isochronous underflow interrupt. More...

#define	Is_udd_underflow(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_UNDERFI))
	Tests if an underflow occurs. More...

#define	udd_enable_underflow_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_UNDERFES)
	Enables underflow interrupt. More...

#define	udd_disable_underflow_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_UNDERFEC)
	Disables underflow interrupt. More...

#define	Is_udd_underflow_interrupt_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_UNDERFE))
	Tests if underflow interrupt is enabled. More...

#define	Is_udd_crc_error(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_CRCERRI))
	Tests if CRC ERROR ISO OUT detected. More...

#define	udd_ack_crc_error(ep) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_CRCERRIC)
	ACKs CRC ERROR ISO OUT detected. More...

#define	udd_raise_crc_error(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_CRCERRIS)
	Raises CRC ERROR ISO OUT detected. More...

#define	udd_enable_crc_error_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_CRCERRES)
	Enables CRC ERROR ISO OUT detected interrupt. More...

#define	udd_disable_crc_error_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_CRCERREC)
	Disables CRC ERROR ISO OUT detected interrupt. More...

#define	Is_udd_crc_error_interrupt_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_CRCERRE))
	Tests if CRC ERROR ISO OUT detected interrupt is enabled. More...

USBHS Device control endpoint transfer
These macros control the endpoint transfer.
#define	Is_udd_read_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_RWALL))
	Tests if endpoint read allowed. More...

#define	Is_udd_write_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_RWALL))
	Tests if endpoint write allowed. More...

#define	udd_byte_count(ep) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_BYCT_Msk))
	Returns the byte count. More...

#define	udd_ack_fifocon(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_FIFOCONC)
	Clears FIFOCON bit. More...

#define	Is_udd_fifocon(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_FIFOCON))
	Tests if FIFOCON bit set. More...

#define	udd_nb_busy_bank(ep) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_NBUSYBK_Msk))
	Returns the number of busy banks. More...

#define	udd_current_bank(ep) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_CURRBK_Msk))
	Returns the number of the current bank. More...

#define	udd_kill_last_in_bank(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_KILLBKS)
	Kills last bank. More...

#define	Is_udd_kill_last(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_KILLBK))

#define	Is_udd_last_in_bank_killed(ep) (!Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_KILLBK))
	Tests if last bank killed. More...

#define	udd_force_bank_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_NBUSYBKS)
	Forces all banks full (OUT) or free (IN) interrupt. More...

#define	udd_unforce_bank_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_NBUSYBKS)
	Unforces all banks full (OUT) or free (IN) interrupt. More...

#define	udd_enable_bank_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_NBUSYBKES)
	Enables all banks full (OUT) or free (IN) interrupt. More...

#define	udd_disable_bank_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_NBUSYBKEC)
	Disables all banks full (OUT) or free (IN) interrupt. More...

#define	Is_udd_bank_interrupt_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_NBUSYBKE))
	Tests if all banks full (OUT) or free (IN) interrupt enabled. More...

#define	Is_udd_short_packet(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_SHORTPACKET))
	Tests if SHORT PACKET received. More...

#define	udd_ack_short_packet(ep) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_SHORTPACKETC)
	ACKs SHORT PACKET received. More...

#define	udd_raise_short_packet(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_SHORTPACKETS)
	Raises SHORT PACKET received. More...

#define	udd_enable_short_packet_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_SHORTPACKETES)
	Enables SHORT PACKET received interrupt. More...

#define	udd_disable_short_packet_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_SHORTPACKETEC)
	Disables SHORT PACKET received interrupt. More...

#define	Is_udd_short_packet_interrupt_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_SHORTPACKETE))
	Tests if SHORT PACKET received interrupt is enabled. More...

#define	Is_udd_setup_received(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_RXSTPI))
	Tests if SETUP received. More...

#define	udd_ack_setup_received(ep) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_RXSTPIC)
	ACKs SETUP received. More...

#define	udd_raise_setup_received(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_RXSTPIS)
	Raises SETUP received. More...

#define	udd_enable_setup_received_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_RXSTPES)
	Enables SETUP received interrupt. More...

#define	udd_disable_setup_received_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_RXSTPEC)
	Disables SETUP received interrupt. More...

#define	Is_udd_setup_received_interrupt_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_RXSTPE))
	Tests if SETUP received interrupt is enabled. More...

#define	Is_udd_out_received(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_RXOUTI))
	Tests if OUT received. More...

#define	udd_ack_out_received(ep) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_RXOUTIC)
	ACKs OUT received. More...

#define	udd_raise_out_received(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_RXOUTIS)
	Raises OUT received. More...

#define	udd_enable_out_received_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_RXOUTES)
	Enables OUT received interrupt. More...

#define	udd_disable_out_received_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_RXOUTEC)
	Disables OUT received interrupt. More...

#define	Is_udd_out_received_interrupt_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_RXOUTE))
	Tests if OUT received interrupt is enabled. More...

#define	Is_udd_in_send(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_TXINI))
	Tests if IN sending. More...

#define	udd_ack_in_send(ep) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_TXINIC)
	ACKs IN sending. More...

#define	udd_raise_in_send(ep) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_TXINIS)
	Raises IN sending. More...

#define	udd_enable_in_send_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_TXINES)
	Enables IN sending interrupt. More...

#define	udd_disable_in_send_interrupt(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_TXINEC)
	Disables IN sending interrupt. More...

#define	Is_udd_in_send_interrupt_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_TXINE))
	Tests if IN sending interrupt is enabled. More...

#define	udd_get_endpoint_fifo_access(ep, scale) (((volatile TPASTE2(U, scale) (*)[0x8000 / ((scale) / 8)])USBHS_RAM_ADDR)[(ep)])
	Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint. More...

USBHS endpoint DMA drivers
These macros manage the common features of the endpoint DMA channels.
#define	UDD_ENDPOINT_MAX_TRANS 0x10000
	Maximum transfer size on USB DMA. More...

#define	udd_enable_endpoint_int_dis_hdma_req(ep) (USBHS_ARRAY(USBHS_DEVEPTIER[0](ep) = USBHS_DEVEPTIER_EPDISHDMAS)
	Enables the disabling of HDMA requests by endpoint interrupts. More...

#define	udd_disable_endpoint_int_dis_hdma_req(ep) (USBHS_ARRAY(USBHS_DEVEPTIDR[0](ep) = USBHS_DEVEPTIDR_EPDISHDMAC)
	Disables the disabling of HDMA requests by endpoint interrupts. More...

#define	Is_udd_endpoint_int_dis_hdma_req_enabled(ep) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0](ep), USBHS_DEVEPTIMR_EPDISHDMA))
	Tests if the disabling of HDMA requests by endpoint interrupts is enabled. More...

#define	udd_raise_endpoint_dma_interrupt(ep) (USBHS->USBHS_DEVIFR = USBHS_DEVIFR_DMA_1 << ((ep) - 1))
	Raises the selected endpoint DMA channel interrupt. More...

#define	udd_clear_endpoint_dma_interrupt(ep) (USBHS->USBHS_DEVICR = USBHS_DEVISR_DMA_1 << ((ep) - 1))
	Raises the selected endpoint DMA channel interrupt. More...

#define	Is_udd_endpoint_dma_interrupt(ep) (Tst_bits(USBHS->USBHS_DEVISR, USBHS_DEVISR_DMA_1 << ((ep) - 1)))
	Tests if an interrupt is triggered by the selected endpoint DMA channel. More...

#define	udd_enable_endpoint_dma_interrupt(ep) (USBHS->USBHS_DEVIER = USBHS_DEVIER_DMA_1 << ((ep) - 1))
	Enables the selected endpoint DMA channel interrupt. More...

#define	udd_disable_endpoint_dma_interrupt(ep) (USBHS->USBHS_DEVIDR = USBHS_DEVIDR_DMA_1 << ((ep) - 1))
	Disables the selected endpoint DMA channel interrupt. More...

#define	Is_udd_endpoint_dma_interrupt_enabled(ep) (Tst_bits(USBHS->USBHS_DEVIMR, USBHS_DEVIMR_DMA_1 << ((ep) - 1)))
	Tests if the selected endpoint DMA channel interrupt is enabled. More...

#define	UDD_ENDPOINT_DMA_STOP_NOW (0)
	DMA channel control command. More...

#define	UDD_ENDPOINT_DMA_RUN_AND_STOP (USBHS_DEVDMACONTROL_CHANN_ENB)

#define	UDD_ENDPOINT_DMA_LOAD_NEXT_DESC (USBHS_DEVDMACONTROL_LDNXT_DSC)

#define	UDD_ENDPOINT_DMA_RUN_AND_LINK (USBHS_DEVDMACONTROL_CHANN_ENB\|USBHS_DEVDMACONTROL_LDNXT_DSC)

#define	USBHS_UDDMA_ARRAY(ep) (((volatile uotghs_dmach_t *)USBHS->USBHS_DEVDMA)[(ep) - 1])
	Structure for DMA registers. More...

#define	udd_endpoint_dma_set_control(ep, desc) (USBHS_UDDMA_ARRAY(ep).control = desc)
	Set control desc to selected endpoint DMA channel. More...

#define	udd_endpoint_dma_get_control(ep) (USBHS_UDDMA_ARRAY(ep).control)
	Get control desc to selected endpoint DMA channel. More...

#define	udd_endpoint_dma_set_addr(ep, add) (USBHS_UDDMA_ARRAY(ep).addr = add)
	Set RAM address to selected endpoint DMA channel. More...

#define	udd_endpoint_dma_get_status(ep) (USBHS_UDDMA_ARRAY(ep).status)
	Get status to selected endpoint DMA channel. More...

typedef struct sam_uotghs_dmadesc_t	uotghs_dmadesc_t

typedef struct sam_uotghs_dmach_t	uotghs_dmach_t

#define Is_udd_address_enabled ( ) (Tst_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_ADDEN))

#define Is_udd_bank_interrupt_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_NBUSYBKE))

Tests if all banks full (OUT) or free (IN) interrupt enabled.

Referenced by udd_ep_interrupt().

#define Is_udd_crc_error ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_CRCERRI))

Tests if CRC ERROR ISO OUT detected.

Referenced by udd_ep_interrupt().

#define Is_udd_crc_error_interrupt_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_CRCERRE))

Tests if CRC ERROR ISO OUT detected interrupt is enabled.

#define Is_udd_data_toggle_reset ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_RSTDT))

Tests if the data toggle sequence is being reset.

#define Is_udd_endpoint_bank_autoswitch_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_AUTOSW))

#define Is_udd_endpoint_configured ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_CFGOK))

Tests if current endpoint is configured.

Referenced by udd_ep_alloc().

#define Is_udd_endpoint_dma_interrupt ( ep ) (Tst_bits(USBHS->USBHS_DEVISR, USBHS_DEVISR_DMA_1 << ((ep) - 1)))

Tests if an interrupt is triggered by the selected endpoint DMA channel.

Referenced by udd_ep_interrupt().

#define Is_udd_endpoint_dma_interrupt_enabled ( ep ) (Tst_bits(USBHS->USBHS_DEVIMR, USBHS_DEVIMR_DMA_1 << ((ep) - 1)))

Tests if the selected endpoint DMA channel interrupt is enabled.

Referenced by udd_ep_interrupt().

#define Is_udd_endpoint_enabled ( ep ) (Tst_bits(USBHS->USBHS_DEVEPT, USBHS_DEVEPT_EPEN0 << (ep)))

tests if the selected endpoint is enabled

Referenced by udd_ep_alloc(), udd_ep_run(), and udd_ep_wait_stall_clear().

#define Is_udd_endpoint_in ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPDIR))

Referenced by udd_ep_alloc(), udd_ep_finish_job(), udd_ep_run(), and udd_ep_trans_done().

#define Is_udd_endpoint_int_dis_hdma_req_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0](ep), USBHS_DEVEPTIMR_EPDISHDMA))

Tests if the disabling of HDMA requests by endpoint interrupts is enabled.

#define Is_udd_endpoint_interrupt ( ep ) (Tst_bits(USBHS->USBHS_DEVISR, USBHS_DEVISR_PEP_0 << (ep)))

Tests if an interrupt is triggered by the selected endpoint.

Referenced by udd_ctrl_interrupt().

#define Is_udd_endpoint_interrupt_enabled ( ep ) (Tst_bits(USBHS->USBHS_DEVIMR, USBHS_DEVIMR_PEP_0 << (ep)))

Tests if the selected endpoint interrupt is enabled.

Referenced by udd_ep_interrupt().

#define Is_udd_endpoint_stall_requested ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_STALLRQ))

Tests if STALL handshake request is running.

Referenced by udd_ep_clear_halt(), udd_ep_is_halted(), udd_ep_run(), udd_ep_set_halt(), and udd_ep_wait_stall_clear().

#define Is_udd_fifocon ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_FIFOCON))

Tests if FIFOCON bit set.

#define Is_udd_in_send ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_TXINI))

Tests if IN sending.

Referenced by udd_ctrl_interrupt(), udd_ctrl_overflow(), and udd_ep_interrupt().

#define Is_udd_in_send_interrupt_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_TXINE))

Tests if IN sending interrupt is enabled.

Referenced by udd_ctrl_interrupt(), and udd_ep_interrupt().

#define Is_udd_kill_last ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_KILLBK))

Referenced by udd_ep_abort().

#define Is_udd_last_in_bank_killed ( ep ) (!Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_KILLBK))

Tests if last bank killed.

#define Is_udd_memory_allocated ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_ALLOC))

#define Is_udd_nak_in ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_NAKINI))

Tests if NAK IN received.

Referenced by udd_ctrl_interrupt().

#define Is_udd_nak_in_interrupt_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_NAKINE))

Tests if NAK IN interrupt is enabled.

#define Is_udd_nak_out ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_NAKOUTI))

Tests if NAK OUT received.

Referenced by udd_ctrl_interrupt().

#define Is_udd_nak_out_interrupt_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_NAKOUTE))

Tests if NAK OUT interrupt is enabled.

#define Is_udd_out_received ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_RXOUTI))

Tests if OUT received.

Referenced by udd_ctrl_in_sent(), udd_ctrl_interrupt(), udd_ctrl_underflow(), and udd_ep_interrupt().

#define Is_udd_out_received_interrupt_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_RXOUTE))

Tests if OUT received interrupt is enabled.

Referenced by udd_ep_interrupt().

#define Is_udd_overflow ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_OVERFI))

Tests if an overflow occurs.

Referenced by udd_ep_interrupt().

#define Is_udd_overflow_interrupt_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_OVERFE))

Tests if overflow interrupt is enabled.

#define Is_udd_read_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_RWALL))

Tests if endpoint read allowed.

#define Is_udd_resetting_endpoint ( ep ) (Tst_bits(USBHS->USBHS_DEVEPT, USBHS_DEVEPT_EPRST0 << (ep)))

Tests if the selected endpoint is being reset.

#define Is_udd_setup_received ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_RXSTPI))

Tests if SETUP received.

Referenced by udd_ctrl_interrupt().

#define Is_udd_setup_received_interrupt_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_RXSTPE))

Tests if SETUP received interrupt is enabled.

#define Is_udd_short_packet ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_SHORTPACKET))

Tests if SHORT PACKET received.

#define Is_udd_short_packet_interrupt_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_SHORTPACKETE))

Tests if SHORT PACKET received interrupt is enabled.

#define Is_udd_stall ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_STALLEDI))

Tests if STALL sent.

Referenced by udd_ep_clear_halt().

#define Is_udd_stall_interrupt_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_STALLEDE))

Tests if STALL sent interrupt is enabled.

#define Is_udd_underflow ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_UNDERFI))

Tests if an underflow occurs.

Referenced by udd_ep_interrupt().

#define Is_udd_underflow_interrupt_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTIMR[0], ep), USBHS_DEVEPTIMR_UNDERFE))

Tests if underflow interrupt is enabled.

#define Is_udd_write_enabled ( ep ) (Tst_bits(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_RWALL))

Tests if endpoint write allowed.

Referenced by udd_ep_trans_done().

#define udd_ack_crc_error ( ep ) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_CRCERRIC)

ACKs CRC ERROR ISO OUT detected.

#define udd_ack_fifocon ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_FIFOCONC)

Clears FIFOCON bit.

Referenced by udd_ep_interrupt(), and udd_test_mode_packet().

#define udd_ack_in_send ( ep ) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_TXINIC)

ACKs IN sending.

Referenced by udd_ctrl_in_sent(), udd_ctrl_send_zlp_in(), udd_ep_interrupt(), and udd_ep_trans_done().

#define udd_ack_nak_in ( ep ) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_NAKINIC)

ACKs NAK IN received.

Referenced by udd_ctrl_interrupt(), udd_ctrl_out_received(), udd_ctrl_send_zlp_out(), and udd_ctrl_setup_received().

#define udd_ack_nak_out ( ep ) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_NAKOUTIC)

ACKs NAK OUT received.

Referenced by udd_ctrl_interrupt(), and udd_ctrl_send_zlp_in().

#define udd_ack_out_received ( ep ) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_RXOUTIC)

ACKs OUT received.

Referenced by udd_ctrl_init(), and udd_ctrl_out_received().

#define udd_ack_overflow_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_OVERFIC)

ACKs endpoint isochronous overflow interrupt.

#define udd_ack_setup_received ( ep ) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_RXSTPIC)

ACKs SETUP received.

Referenced by udd_ctrl_setup_received().

#define udd_ack_short_packet ( ep ) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_SHORTPACKETC)

ACKs SHORT PACKET received.

#define udd_ack_stall ( ep ) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_STALLEDIC)

ACKs STALL sent.

Referenced by udd_ep_clear_halt(), and udd_ep_set_halt().

#define udd_ack_underflow_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTICR[0], ep) = USBHS_DEVEPTICR_UNDERFIC)

ACKs endpoint isochronous underflow interrupt.

#define udd_allocate_memory ( ep ) (Set_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_ALLOC))

Allocates the configuration selected endpoint in DPRAM memory.

Referenced by udd_ep_alloc(), udd_reset_ep_ctrl(), and udd_test_mode_packet().

#define udd_byte_count ( ep ) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_BYCT_Msk))

Returns the byte count.

Referenced by udd_ctrl_out_received(), and udd_ctrl_setup_received().

#define udd_clear_endpoint_dma_interrupt ( ep ) (USBHS->USBHS_DEVICR = USBHS_DEVISR_DMA_1 << ((ep) - 1))

Raises the selected endpoint DMA channel interrupt.

#define udd_configure_address ( addr ) (Wr_bitfield(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_UADD_Msk, addr))

configures the USB device address

Referenced by udd_reset_ep_ctrl(), and udd_set_address().

#define udd_configure_endpoint	(	ep,
		type,
		dir,
		size,
		bank
	)

Value:

(\
	Wr_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPTYPE_Msk |\
            USBHS_DEVEPTCFG_EPDIR  |\
            USBHS_DEVEPTCFG_EPSIZE_Msk |\
            USBHS_DEVEPTCFG_EPBK_Msk ,   \
            (((uint32_t)(type) << USBHS_DEVEPTCFG_EPTYPE_Pos) & USBHS_DEVEPTCFG_EPTYPE_Msk) |\
            (((uint32_t)(dir ) << USBHS_DEVEPTCFG_EPDIR_Pos ) & USBHS_DEVEPTCFG_EPDIR) |\
            ( (uint32_t)udd_format_endpoint_size(size) << USBHS_DEVEPTCFG_EPSIZE_Pos) |\
            (((uint32_t)(bank) << USBHS_DEVEPTCFG_EPBK_Pos) & USBHS_DEVEPTCFG_EPBK_Msk))\
)

Configures selected endpoint in one step.

Referenced by udd_ep_alloc(), udd_reset_ep_ctrl(), and udd_test_mode_packet().

#define udd_configure_endpoint_bank	(	ep,
		bank
	)	(Wr_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPBK_Msk, bank))

Configures the selected endpoint number of banks.

#define udd_configure_endpoint_direction	(	ep,
		dir
	)	(Wr_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPDIR, dir))

Configures the selected endpoint direction.

#define udd_configure_endpoint_size	(	ep,
		size
	)	(Wr_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPSIZE_Msk, udd_format_endpoint_size(size)))

Configures the selected endpoint size.

#define udd_configure_endpoint_type	(	ep,
		type
	)	(Wr_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPTYPE_Msk, type))

Configures the selected endpoint type.

#define udd_control_direction ( ) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTISR[0], EP_CONTROL), USBHS_DEVEPTISR_CTRLDIR))

Returns the control direction.

#define udd_current_bank ( ep ) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_CURRBK_Msk))

Returns the number of the current bank.

#define udd_data_toggle ( ep ) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_DTSEQ_Msk))

Returns data toggle.

#define udd_disable_address ( ) (Clr_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_ADDEN))

disables USB device address

Referenced by udd_set_address().

#define udd_disable_bank_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_NBUSYBKEC)

Disables all banks full (OUT) or free (IN) interrupt.

Referenced by udd_ep_clear_halt(), and udd_ep_interrupt().

#define udd_disable_crc_error_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_CRCERREC)

Disables CRC ERROR ISO OUT detected interrupt.

#define udd_disable_endpoint ( ep ) (Clr_bits(USBHS->USBHS_DEVEPT, USBHS_DEVEPT_EPEN0 << (ep)))

disables the selected endpoint

Referenced by udd_ep_alloc(), udd_ep_free(), and udd_test_mode_packet().

#define udd_disable_endpoint_bank_autoswitch ( ep ) (Clr_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_AUTOSW))

Disables the bank autoswitch for the selected endpoint.

Referenced by udd_ep_interrupt(), udd_ep_run(), and udd_ep_set_halt().

#define udd_disable_endpoint_dma_interrupt ( ep ) (USBHS->USBHS_DEVIDR = USBHS_DEVIDR_DMA_1 << ((ep) - 1))

Disables the selected endpoint DMA channel interrupt.

Referenced by udd_ep_abort(), and udd_ep_interrupt().

#define udd_disable_endpoint_int_dis_hdma_req ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0](ep) = USBHS_DEVEPTIDR_EPDISHDMAC)

Disables the disabling of HDMA requests by endpoint interrupts.

#define udd_disable_endpoint_interrupt ( ep ) (USBHS->USBHS_DEVIDR = USBHS_DEVIDR_PEP_0 << (ep))

Disables the selected endpoint interrupt.

Referenced by udd_ep_abort(), udd_ep_clear_halt(), and udd_ep_interrupt().

#define udd_disable_in_send_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_TXINEC)

Disables IN sending interrupt.

Referenced by udd_ctrl_in_sent(), udd_ctrl_init(), udd_ep_abort(), udd_ep_interrupt(), and udd_ep_set_halt().

#define udd_disable_nak_in_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_NAKINEC)

Disables NAK IN interrupt.

Referenced by udd_ctrl_interrupt().

#define udd_disable_nak_out_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_NAKOUTEC)

Disables NAK OUT interrupt.

Referenced by udd_ctrl_interrupt().

#define udd_disable_out_received_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_RXOUTEC)

Disables OUT received interrupt.

Referenced by udd_ep_abort().

#define udd_disable_overflow_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_OVERFEC)

Disables overflow interrupt.

#define udd_disable_setup_received_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_RXSTPEC)

Disables SETUP received interrupt.

#define udd_disable_short_packet_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_SHORTPACKETEC)

Disables SHORT PACKET received interrupt.

#define udd_disable_stall_handshake ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_STALLRQC)

Disables the STALL handshake.

Referenced by udd_ep_clear_halt().

#define udd_disable_stall_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_STALLEDEC)

Disables STALL sent interrupt.

#define udd_disable_underflow_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIDR[0], ep) = USBHS_DEVEPTIDR_UNDERFEC)

Disables underflow interrupt.

#define udd_enable_address ( ) (Set_bits(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_ADDEN))

enables USB device address

Referenced by udd_reset_ep_ctrl(), and udd_set_address().

#define udd_enable_bank_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_NBUSYBKES)

Enables all banks full (OUT) or free (IN) interrupt.

Referenced by udd_ep_set_halt().

#define udd_enable_crc_error_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_CRCERRES)

Enables CRC ERROR ISO OUT detected interrupt.

#define udd_enable_endpoint ( ep ) (Set_bits(USBHS->USBHS_DEVEPT, USBHS_DEVEPT_EPEN0 << (ep)))

enables the selected endpoint

Referenced by udd_ep_alloc(), udd_reset_ep_ctrl(), and udd_test_mode_packet().

#define udd_enable_endpoint_bank_autoswitch ( ep ) (Set_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_AUTOSW))

Enables the bank autoswitch for the selected endpoint.

Referenced by udd_ep_alloc(), udd_ep_clear_halt(), and udd_ep_set_halt().

#define udd_enable_endpoint_dma_interrupt ( ep ) (USBHS->USBHS_DEVIER = USBHS_DEVIER_DMA_1 << ((ep) - 1))

Enables the selected endpoint DMA channel interrupt.

Referenced by udd_ep_trans_done().

#define udd_enable_endpoint_int_dis_hdma_req ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0](ep) = USBHS_DEVEPTIER_EPDISHDMAS)

Enables the disabling of HDMA requests by endpoint interrupts.

#define udd_enable_endpoint_interrupt ( ep ) (USBHS->USBHS_DEVIER = USBHS_DEVIER_PEP_0 << (ep))

Enables the selected endpoint interrupt.

Referenced by udd_ep_run(), udd_ep_set_halt(), udd_ep_trans_done(), and udd_reset_ep_ctrl().

#define udd_enable_in_send_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_TXINES)

Enables IN sending interrupt.

Referenced by udd_ctrl_in_sent(), udd_ctrl_send_zlp_in(), udd_ep_run(), and udd_ep_trans_done().

#define udd_enable_nak_in_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_NAKINES)

Enables NAK IN interrupt.

Referenced by udd_ctrl_out_received(), udd_ctrl_send_zlp_out(), and udd_ctrl_setup_received().

#define udd_enable_nak_out_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_NAKOUTES)

Enables NAK OUT interrupt.

Referenced by udd_ctrl_send_zlp_in().

#define udd_enable_out_received_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_RXOUTES)

Enables OUT received interrupt.

Referenced by udd_ep_run(), and udd_reset_ep_ctrl().

#define udd_enable_overflow_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_OVERFES)

Enables overflow interrupt.

#define udd_enable_setup_received_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_RXSTPES)

Enables SETUP received interrupt.

Referenced by udd_reset_ep_ctrl().

#define udd_enable_short_packet_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_SHORTPACKETES)

Enables SHORT PACKET received interrupt.

#define udd_enable_stall_handshake ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_STALLRQS)

Enables the STALL handshake.

Referenced by udd_ctrl_overflow(), udd_ctrl_stall_data(), udd_ctrl_underflow(), udd_ep_interrupt(), and udd_ep_set_halt().

#define udd_enable_stall_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_STALLEDES)

Enables STALL sent interrupt.

#define udd_enable_underflow_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_UNDERFES)

Enables underflow interrupt.

#define udd_endpoint_dma_get_control ( ep ) (USBHS_UDDMA_ARRAY(ep).control)

Get control desc to selected endpoint DMA channel.

#define udd_endpoint_dma_get_status ( ep ) (USBHS_UDDMA_ARRAY(ep).status)

Get status to selected endpoint DMA channel.

Referenced by udd_ep_interrupt(), and udd_ep_trans_done().

#define UDD_ENDPOINT_DMA_LOAD_NEXT_DESC (USBHS_DEVDMACONTROL_LDNXT_DSC)

#define UDD_ENDPOINT_DMA_RUN_AND_LINK (USBHS_DEVDMACONTROL_CHANN_ENB|USBHS_DEVDMACONTROL_LDNXT_DSC)

#define UDD_ENDPOINT_DMA_RUN_AND_STOP (USBHS_DEVDMACONTROL_CHANN_ENB)

#define udd_endpoint_dma_set_addr	(	ep,
		add
	)	(USBHS_UDDMA_ARRAY(ep).addr = add)

Set RAM address to selected endpoint DMA channel.

Referenced by udd_ep_trans_done().

#define udd_endpoint_dma_set_control	(	ep,
		desc
	)	(USBHS_UDDMA_ARRAY(ep).control = desc)

Set control desc to selected endpoint DMA channel.

Referenced by udd_ep_abort(), and udd_ep_trans_done().

#define UDD_ENDPOINT_DMA_STOP_NOW (0)

DMA channel control command.

#define UDD_ENDPOINT_MAX_TRANS 0x10000

Maximum transfer size on USB DMA.

Referenced by udd_ep_trans_done().

#define udd_force_bank_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_NBUSYBKS)

Forces all banks full (OUT) or free (IN) interrupt.

#define udd_format_endpoint_size ( size ) (32 - clz(((uint32_t)min(max(size, 8), 1024) << 1) - 1) - 1 - 3)

Bounds given integer size to allowed range and rounds it up to the nearest available greater size, then applies register format of USBHS controller for endpoint size bit-field.

#define udd_get_configured_address ( ) (Rd_bitfield(USBHS->USBHS_DEVCTRL, USBHS_DEVCTRL_UADD_Msk))

gets the currently configured USB device address

Referenced by udd_getaddress().

#define udd_get_endpoint_bank ( ep ) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPBK_Msk)+1)

Gets the configured selected endpoint number of banks.

#define udd_get_endpoint_direction ( ep ) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPDIR))

Gets the configured selected endpoint direction.

#define udd_get_endpoint_fifo_access	(	ep,
		scale
	)	(((volatile TPASTE2(U, scale) (*)[0x8000 / ((scale) / 8)])USBHS_RAM_ADDR)[(ep)])

Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint.

Parameters

ep	Endpoint of which to access FIFO data register
scale	Data scale in bits: 64, 32, 16 or 8

Returns: Volatile 64-, 32-, 16- or 8-bit data pointer to FIFO data register

Warning: It is up to the user of this macro to make sure that all accesses are aligned with their natural boundaries except 64-bit accesses which require only 32-bit alignment.; It is up to the user of this macro to make sure that used HSB addresses are identical to the DPRAM internal pointer modulo 32 bits.

Referenced by udd_ctrl_in_sent(), udd_ctrl_out_received(), udd_ctrl_setup_received(), and udd_test_mode_packet().

#define udd_get_endpoint_size ( ep ) (8 << Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPSIZE_Msk))

Gets the configured selected endpoint size.

Referenced by udd_ep_trans_done().

#define udd_get_endpoint_type ( ep ) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_EPTYPE_Msk))

Gets the configured selected endpoint type.

Referenced by udd_ep_trans_done().

#define udd_get_interrupt_endpoint_number ( )

Value:

(ctz(((USBHS->USBHS_DEVISR >> USBHS_DEVISR_PEP_Pos) & \
                                                   (USBHS->USBHS_DEVIMR >> USBHS_DEVIMR_PEP_Pos)) |     \
                                                   (1 << MAX_PEP_NB)))

Returns the lowest endpoint number generating an endpoint interrupt or MAX_PEP_NB if none.

#define udd_kill_last_in_bank ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_KILLBKS)

Kills last bank.

Referenced by udd_ep_abort().

#define udd_nb_busy_bank ( ep ) (Rd_bitfield(USBHS_ARRAY(USBHS_DEVEPTISR[0], ep), USBHS_DEVEPTISR_NBUSYBK_Msk))

Returns the number of busy banks.

Referenced by udd_ep_abort(), udd_ep_interrupt(), and udd_ep_set_halt().

#define udd_raise_crc_error ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_CRCERRIS)

Raises CRC ERROR ISO OUT detected.

#define udd_raise_endpoint_dma_interrupt ( ep ) (USBHS->USBHS_DEVIFR = USBHS_DEVIFR_DMA_1 << ((ep) - 1))

Raises the selected endpoint DMA channel interrupt.

#define udd_raise_in_send ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_TXINIS)

Raises IN sending.

Referenced by udd_ep_trans_done().

#define udd_raise_nak_in ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_NAKINIS)

Raises NAK IN received.

#define udd_raise_nak_out ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_NAKOUTIS)

Raises NAK OUT received.

#define udd_raise_out_received ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_RXOUTIS)

Raises OUT received.

#define udd_raise_overflow_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_OVERFIS)

Raises endpoint isochronous overflow interrupt.

#define udd_raise_setup_received ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_RXSTPIS)

Raises SETUP received.

#define udd_raise_short_packet ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_SHORTPACKETS)

Raises SHORT PACKET received.

#define udd_raise_stall ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_STALLEDIS)

Raises STALL sent.

#define udd_raise_underflow_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_UNDERFIS)

Raises endpoint isochronous underflow interrupt.

#define udd_reset_data_toggle ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIER[0], ep) = USBHS_DEVEPTIER_RSTDTS)

Resets the data toggle sequence.

Referenced by udd_ep_clear_halt(), and udd_ep_interrupt().

#define udd_reset_endpoint ( ep )

Value:

do {                                                               \
		Set_bits(USBHS->USBHS_DEVEPT, USBHS_DEVEPT_EPRST0 << (ep)); \
		Clr_bits(USBHS->USBHS_DEVEPT, USBHS_DEVEPT_EPRST0 << (ep)); \
    } while (0)

resets the selected endpoint

#define udd_unallocate_memory ( ep ) (Clr_bits(USBHS_ARRAY(USBHS_DEVEPTCFG[0], ep), USBHS_DEVEPTCFG_ALLOC))

un-allocates the configuration selected endpoint in DPRAM memory

Referenced by udd_ep_alloc(), and udd_ep_free().

#define udd_unforce_bank_interrupt ( ep ) (USBHS_ARRAY(USBHS_DEVEPTIFR[0], ep) = USBHS_DEVEPTIFR_NBUSYBKS)

Unforces all banks full (OUT) or free (IN) interrupt.

#define USBHS_ARRAY	(	reg,
		index
	)	((&(USBHS->reg))[(index)])

Generic macro for USBHS registers that can be arrayed.

Referenced by udd_ctrl_interrupt().

#define USBHS_DEVIMR_PEP_Pos 12

#define USBHS_DEVISR_PEP_Pos 12

#define USBHS_RAM_ADDR 0xA0100000u

#define USBHS_UDDMA_ARRAY ( ep ) (((volatile uotghs_dmach_t *)USBHS->USBHS_DEVDMA)[(ep) - 1])

Structure for DMA registers.

typedef struct sam_uotghs_dmach_t uotghs_dmach_t

typedef struct sam_uotghs_dmadesc_t uotghs_dmadesc_t

Microchip® Advanced Software Framework

Data Structures

Macros

USBHS endpoint DMA drivers