Chip-specific system clock manager configuration.
Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
#define | CONFIG_RCFAST_FRANGE 2 |
#define | CONFIG_SYSCLK_CPU_DIV 0 |
#define | CONFIG_SYSCLK_PBA_DIV 0 |
#define | CONFIG_SYSCLK_PBB_DIV 0 |
#define | CONFIG_SYSCLK_PBC_DIV 2 |
#define | CONFIG_SYSCLK_PBD_DIV 2 |
#define | CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCFAST |
#define CONFIG_RCFAST_FRANGE 2 |
Referenced by osc_priv_enable_rcfast(), and sysclk_get_main_hz().
#define CONFIG_SYSCLK_CPU_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBA_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBB_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBC_DIV 2 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBD_DIV 2 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCFAST |
Referenced by sysclk_init().