Chip-specific system clock manager configuration.
Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
#define | CONFIG_RCFAST_FRANGE 2 |
#define | CONFIG_SYSCLK_CPU_DIV 0 |
#define | CONFIG_SYSCLK_INIT_CPUMASK 0 |
#define | CONFIG_SYSCLK_INIT_HSBMASK ((1 << SYSCLK_HFLASHC_DATA) | (SYSCLK_PBC_BRIDGE) | (SYSCLK_PBD_BRIDGE)) |
#define | CONFIG_SYSCLK_INIT_PBAMASK 0 |
#define | CONFIG_SYSCLK_INIT_PBBMASK ((1 << SYSCLK_HFLASHC_REGS)) |
#define | CONFIG_SYSCLK_INIT_PBCMASK ((1 << SYSCLK_PM) | (1 << SYSCLK_SCIF) | (1 << SYSCLK_GPIO)) |
#define | CONFIG_SYSCLK_INIT_PBDMASK ((1 << SYSCLK_BPM) | (1 << SYSCLK_BSCIF) | (1 << SYSCLK_AST)) |
#define | CONFIG_SYSCLK_PBA_DIV 0 |
#define | CONFIG_SYSCLK_PBB_DIV 0 |
#define | CONFIG_SYSCLK_PBC_DIV 2 |
#define | CONFIG_SYSCLK_PBD_DIV 2 |
#define | CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCFAST |
#define CONFIG_RCFAST_FRANGE 2 |
Referenced by osc_priv_enable_rcfast(), and sysclk_get_main_hz().
#define CONFIG_SYSCLK_CPU_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_CPUMASK 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_HSBMASK ((1 << SYSCLK_HFLASHC_DATA) | (SYSCLK_PBC_BRIDGE) | (SYSCLK_PBD_BRIDGE)) |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_PBAMASK 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_PBBMASK ((1 << SYSCLK_HFLASHC_REGS)) |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_PBCMASK ((1 << SYSCLK_PM) | (1 << SYSCLK_SCIF) | (1 << SYSCLK_GPIO)) |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_INIT_PBDMASK ((1 << SYSCLK_BPM) | (1 << SYSCLK_BSCIF) | (1 << SYSCLK_AST)) |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBA_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBB_DIV 0 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBC_DIV 2 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_PBD_DIV 2 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RCFAST |
Referenced by sysclk_init().