Microchip® Advanced Software Framework

 All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
FLASHCALW example1 for SAM4L Xplained Pro Documentation

Introduction

This is the documentation for the data structures, functions, variables, defines, enums, and typedefs for the FLASHCALW software driver.

It also comes bundled with an example. This example demonstrates flash read / write data accesses, using a flash block as an NVRAM, located either in the flash array or in the User page. The security bit will be set finally.

Once the security bit set, the only way to clear it is doing the Chip Erase command through Atmel Stdio 6 or asserting the erase pin to 1.

Operating mode of the example:

  1. After reset, the NVRAM variables are displayed on the USART link.
  2. The NVRAM is cleared (all bytes are set to 0x00).
  3. All NVRAM variables are written with incrementing nibbles, starting from 0x0.
  4. The user can reset or power-cycle the board to check the non-volatileness of the NVRAM.
  5. This is performed once in the flash array and then in the user page.
  6. The last page of the flash array will be locked.
  7. The lock status of the last page will be checked.
  8. The last page will be unlocked.
  9. Waiting for any key pressed in the debug console.
  10. Then security bit will be set. Setting the security bit will lock the chip from further access through all external programming and debugging interfaces.

Main Files

  • flashcalw.c: FLASHCALW driver;
  • flashcalw.h: FLASHCALW driver header file;
  • flashcalw_example.c: flash access example application.

Compilation Information

This software is written for GNU GCC and IAR Embedded Workbench for Atmel. Other compilers may or may not work.

Device Information

All SAM devices with a FLASHCALW module can be used.

Configuration Information

This example has been tested with the following kits:

  • SAM4L-EK evaluation kit;
  • SAM4L Xplained Pro
  • SAM4L8 Xplained Pro This example has been tested with the following configuration:
  • CPU clock: 12 MHz;
  • USARTx abstracted with a USB CDC connection to a PC;
  • PC terminal settings:
    • 115200 bps,
    • 8 data bits,
    • no parity bit,
    • 1 stop bit,
    • no flow control.

Contact Information

For further information, visit Microchip.
Support and FAQ: https://www.microchip.com/support/