Unit test configuration.
Copyright (c) 2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
#define | CONF_DMA XDMAC |
#define | CONF_DMA_CH_IN_L 1 |
#define | CONF_DMA_CH_IN_R 3 |
#define | CONF_DMA_CH_OUT_L 0 |
#define | CONF_DMA_CH_OUT_R 2 |
#define | CONF_DMA_ID ID_XDMAC |
#define | CONF_DMA_IRQn XDMAC_IRQn |
#define | CONF_DMA_PERID_RX_L 45 |
#define | CONF_DMA_PERID_RX_R 49 |
#define | CONF_DMA_PERID_TX_L 44 |
#define | CONF_DMA_PERID_TX_R 48 |
#define | CONF_I2SC I2SC0 |
#define | CONF_TEST_DMA 1 |
#define CONF_DMA XDMAC |
Referenced by config_dma_channel_xfr(), prepare_dma_channel(), start_transfer(), and stop_transfer().
#define CONF_DMA_CH_IN_L 1 |
Referenced by config_dma_channel_xfr(), and start_transfer().
#define CONF_DMA_CH_IN_R 3 |
Referenced by config_dma_channel_xfr(), and start_transfer().
#define CONF_DMA_CH_OUT_L 0 |
Referenced by start_transfer().
#define CONF_DMA_CH_OUT_R 2 |
Referenced by start_transfer().
#define CONF_DMA_ID ID_XDMAC |
Referenced by prepare_dma_channel().
#define CONF_DMA_IRQn XDMAC_IRQn |
#define CONF_DMA_PERID_RX_L 45 |
#define CONF_DMA_PERID_RX_R 49 |
#define CONF_DMA_PERID_TX_L 44 |
#define CONF_DMA_PERID_TX_R 48 |
#define CONF_I2SC I2SC0 |
Referenced by run_i2s_test().
#define CONF_TEST_DMA 1 |