This is the quick start guide for the SAM3A/3U/3X/4E DMA Controller (DMAC) Driver, with step-by-step instructions on how to configure and use the driver for a specific use case.
The code examples can be copied into the main application loop or any other function that will need to control the DMAC module.
Use Cases
DMAC Basic Usage
This use case will demonstrate how to initialize the DMAC module to perform a single memory to memory transfer.
Setup Steps
Prerequisites
This module requires the following service
Setup Code
Add these macros and global variable to the top of your application's C-file:
#define DMA_BUF_SIZE 32
uint32_t g_dma_buf[6][DMA_BUF_SIZE];
Add this to the main loop or a setup function:
Workflow
- Define the variables needed, in order to perform a data transfer:
uint32_t i;
uint32_t cfg;
- Prepare the data buffer to be transferred:
for (i = 0; i < DMA_BUF_SIZE; i++) {
g_dma_buf[0][i] = i;
g_dma_buf[1][i] = 0;
}
- Initialize the DMAC module:
- Set the priority to round-robin:
- Enable the DMAC module:
- Configure the channel for:
- Enable stop on done
- Enable AHB protection
- Set the FIFO so that largest defined length AHB burst is performed
cfg = DMAC_CFG_SOD_ENABLE |
DMAC_CFG_AHB_PROT(1) |
DMAC_CFG_FIFOCFG_ALAP_CFG;
Usage Steps
Usage Code
Configure the DMA source and destination buffer addresses:
Configure DMA CTRLA:
- Set the buffer transfer size to DMA_BUF_SIZE
- Set the source transfer width to 32-bit
- Set the destination transfer width to 32-bit
desc.
ul_ctrlA = DMAC_CTRLA_BTSIZE(DMA_BUF_SIZE) |
DMAC_CTRLA_SRC_WIDTH_WORD |
DMAC_CTRLA_DST_WIDTH_WORD;
Configure DMA CTRLB:
- Disable source buffer descriptor fetch
- Disable destination buffer descriptor Fetch
- Enable memory-to-memory transfer
- Increment the source address
- Increment the destination address
desc.
ul_ctrlB = DMAC_CTRLB_SRC_DSCR_FETCH_DISABLE |
DMAC_CTRLB_DST_DSCR_FETCH_DISABLE |
DMAC_CTRLB_FC_MEM2MEM_DMA_FC |
DMAC_CTRLB_SRC_INCR_INCREMENTING |
DMAC_CTRLB_DST_INCR_INCREMENTING;
Initialize the DMA transfer: Start the DMA transfer: Finally, poll for the DMA transfer to complete: