Microchip® Advanced Software Framework

SAM Low Power Application

Overview:

Introduction

This application demonstrates different sleep modes and performance levels, it can switch among ACTIVE mode, IDLE mode, STANDBY mode and BACKUP mode.

This application has been tested on following boards:

  • SAM L21 Xplained Pro
  • SAM R30 Xplained Pro

Hardware Setup

This application of SAML21 use AIN0(PA02, EXT1 pin10) and SAMR30 use (AIN6(PA06, EXT1 pin3)) as ADC input channel. BUTTON0 is used to wake up system from standby mode and IDLE mode. BUTTON0 is used as an external wake up pin to wake up system from BACKUP mode, the wakeup pin level is low.

Implementation Details

The application covers the following case: Case 1: ACTIVE mode: Performance Level 0 at 12MHz Case 2: ACTIVE mode: Performance Level 2 at 48MHz Case 3: IDLE mode: Performance Level 0 at 12MHz Case 4: STANDBY mode:PD0,PD1 and PD2 in retention state Case 5: BACKUP mode Case 6: OFF mode Case 7: STANDBY mode:dynamic power sleepwalking

When in active Performance Level 2 mode, DFLL48M using XOSC32K as reference and running at 48MHz. When in active Performance Level 0 mode, internal Multi RC Oscillator running at 12MHz. In active mode, EDBG can be used to input command to select different modes.

IDLE,BACKUP and STANDBY modes can be waked up by BUTTON0. OFF mode can only exit if the RESET pin is activated.

In stanby mode(dynamic power sleepwalking), RTC, ADC, EVENT, and DMA modules are used. RTC generates compare value matched EVENT at a fixed interval and route it to ADC, ADC start to sample based on the EVENT, when one conversion is completed, DMA make peripheral-to-memory transfer from the ADC to the HMCRAMLP memory.

RTC is clocked by the internal ULP 32kHz oscillator divided by 64, giving a 512Hz input, and the compare value is 1000. ADC is clocked by the 4MHz from OSC16M divided by 64, giving a 64KHz input. So we can observe the consumption during the STANDBY mode.

The STANDBY mode takes about 30 seconds, and it covers the following cases: Case 13-1 PD0, PD1 and PD2 all in retention state. Case 13-2 PD0 in active state while PD1 and PD2 in retention state. Case 13-3 PD0 and PD1 in active state while PD2 in retention mode. Case 13-4 PD0, PD1 and PD2 all in active mode, and system wakes up. Case 13-4 PD0, PD1 and PD2 all in active mode, and system wakes up.

LED0 is used as an indication for different mode. when GCL0 clock frequency changes, LED0 will toggles LED0_TOGGLE_2 times. when exits from IDLE mode, LED0 will toggles LED0_TOGGLE_4 times. when exits from STANDBY mode, LED0 will toggles LED0_TOGGLE_6 times. when exits from BACKUP mode, LED0 will toggles LED0_TOGGLE_8 times.

Compilation Info

This software was written for the GNU GCC and IAR for ARM. Other compilers may or may not work.

Contact Information

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