Data Structures

Here are the data structures with brief descriptions:

_nvm_module
_rww_eeprom_master_page	Structure describing the EEPROM Emulation master page
_rww_eeprom_module	Internal device instance struct
_rww_eeprom_page	Structure describing emulated pages of RWW EEPROM data
_system_clock_dfll_config	DFLL-specific data container
_system_clock_dpll_config	DPLL-specific data container
_system_clock_module	System clock module data container
_system_clock_xosc_config	XOSC-specific data container
nvm_config	NVM controller configuration structure
nvm_fusebits	NVM user row fuse setting structure
nvm_parameters	NVM memory parameter structure
port_config	Port pin configuration structure
rww_eeprom_emulator_parameters	RWW EEPROM memory parameter structure
StructCPtr	Structure of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers
StructCVPtr	Structure of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers
StructPtr	Structure of pointers to 64-, 32-, 16- and 8-bit unsigned integers
StructVPtr	Structure of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers
system_battery_backup_power_switch_config	Battery Backup Power Switch (BBPS) Control configuration
system_clock_source_dfll_config	Configuration structure for DFLL
system_clock_source_dpll_config	Configuration structure for DPLL
system_clock_source_osc16m_config	Configuration structure for OSC16M
system_clock_source_osc32k_config	Configuration structure for OSCULP32K
system_clock_source_osculp32k_config	Configuration structure for OSCULP32K
system_clock_source_xosc32k_config	Configuration structure for XOSC32K
system_clock_source_xosc_config	Configuration structure for XOSC
system_gclk_chan_config	Generic Clock configuration structure
system_gclk_gen_config	Generic Clock Generator configuration structure
system_pinmux_config	Port pin configuration structure
system_standby_config	Standby configuration
system_voltage_references_config	Voltage References System (VREF) Control configuration
system_voltage_regulator_config	Voltage Regulator System (VREG) Control configuration
test_case	A test case
test_suite	A test suite
Union16	16-bit union
Union32	32-bit union
Union64	64-bit union
UnionCPtr	Union of pointers to constant 64-, 32-, 16- and 8-bit unsigned integers
UnionCVPtr	Union of pointers to constant volatile 64-, 32-, 16- and 8-bit unsigned integers
UnionPtr	Union of pointers to 64-, 32-, 16- and 8-bit unsigned integers
UnionVPtr	Union of pointers to volatile 64-, 32-, 16- and 8-bit unsigned integers
usart_config	USART configuration struct
usart_module	SERCOM USART driver software device instance structure