KSZ8851SNL ethernet PHY driver

This is a low level driver for the KSZ8851SNL ethernet PHY through 4-wire SPI.

It provides functions for configuring and communicating with the ethernet PHY.

Before writing data to the ethernet PHY call ksz8851snl_init() which will set up the physical interface and the PHY. A file named conf_eth.h is needed to define which interface to use. In addition one also need to define the pins KSZ8851SNL_RSTN_PIN, KSZ8851SNL_CS_PIN and KSZ8851SNL_INTN_EIC_PIN and the PHY KSZ8851SNL_CLOCK_SPEED.

Warning

This driver is not reentrant and can not be used in interrupt\ service routines without extra care.

An example conf_eth.h file could look like

* // Interface configuration for SAM D20 Xplained Pro
* #define KSZ8851SNL_SPI                                EXT1_SPI_MODULE
* #define KSZ8851SNL_SPI_IRQn                           SERCOM0_IRQn
*
* // Pins configuration.
* #define KSZ8851SNL_RSTN_PIN                           EXT1_PIN_6
* #define KSZ8851SNL_CS_PIN                             EXT1_PIN_15
* #define KSZ8851SNL_INTN_EIC_CHANNEL                   EXT1_IRQ_INPUT
* #define KSZ8851SNL_INTN_EIC_PIN                       EXT1_IRQ_PIN
* #define KSZ8851SNL_INTN_EIC_PIN_MUX                   EXT1_IRQ_PINMUX
*
* // SPI settings.
* #define KSZ8851SNL_SPI_PINMUX_SETTING                 EXT1_SPI_SERCOM_MUX_SETTING
* #define KSZ8851SNL_SPI_PINMUX_PAD0                    EXT1_SPI_SERCOM_PINMUX_PAD0
* #define KSZ8851SNL_SPI_PINMUX_PAD1                    PINMUX_UNUSED
* #define KSZ8851SNL_SPI_PINMUX_PAD2                    EXT1_SPI_SERCOM_PINMUX_PAD2
* #define KSZ8851SNL_SPI_PINMUX_PAD3                    EXT1_SPI_SERCOM_PINMUX_PAD3
* #define KSZ8851SNL_CLOCK_SPEED                        10000000UL
* 

Dependencies

This driver depends on the following modules:

• asfdoc_samd20_port_group for IO port control.
• asfdoc_samd20_extint_group for IO port interrupt control.
• asfdoc_samd20_system_group for getting system clock speeds for init functions.
• asfdoc_samd20_sercom_spi_group for communication with the OLED controller

Variables
struct spi_module	ksz8851snl_master
struct spi_slave_inst	ksz8851snl_slave

PHY register read/write functions
uint16_t	ksz8851_reg_read (uint16_t reg)
	Read a register value. More...
void	ksz8851_reg_write (uint16_t reg, uint16_t wrdata)
	Write a register value. More...
void	ksz8851_reg_setbits (uint16_t reg, uint16_t bits_to_set)
	Read register content, set bitmask and write back to register. More...
void	ksz8851_reg_clrbits (uint16_t reg, uint16_t bits_to_clr)
	Read register content, clear bitmask and write back to register. More...

PHY FIFO read/write functions
void	ksz8851_fifo_read (uint8_t *buf, uint32_t len)
	Read internal fifo buffer. More...
void	ksz8851_fifo_write_begin (uint32_t tot_len)
	Start to write internal fifo buffer. More...
void	ksz8851_fifo_write (uint8_t *buf, uint32_t len)
	Write internal fifo buffer. More...
void	ksz8851_fifo_write_end (uint32_t pad)
	Complete write operation. More...

Initialization and configuration
uint32_t	ksz8851snl_init (void)
	Initialize the PHY controller. More...
void	configure_intn (void(*p_handler)(void))
	Configure the INTN interrupt. More...

void configure_intn

(

void(*)(void)

p_handler

)

Configure the INTN interrupt.

Parameters

p_handler

callback pointer to use when INTN interrupt raises.

References extint_chan_conf::detection_criteria, EXTINT_CALLBACK_TYPE_DETECT, extint_chan_enable_callback(), extint_chan_get_config_defaults(), extint_chan_set_config(), EXTINT_DETECT_FALLING, EXTINT_PULL_UP, extint_register_callback(), extint_chan_conf::filter_input_signal, extint_chan_conf::gpio_pin, extint_chan_conf::gpio_pin_mux, and extint_chan_conf::gpio_pin_pull.

Referenced by ksz8851snl_low_level_init().

void ksz8851_fifo_read	(	uint8_t *	buf,
		uint32_t	len
	)

Read internal fifo buffer.

Parameters

buf	the buffer to store the data from the fifo buffer.
len	the amount of data to read.

References FIFO_READ, ksz8851snl_master, ksz8851snl_slave, spi_read_buffer_wait(), spi_select_slave(), and spi_transceive_buffer_wait().

Referenced by ksz8851snl_update().

void ksz8851_fifo_write	(	uint8_t *	buf,
		uint32_t	len
	)

Write internal fifo buffer.

Parameters

buf	the buffer to send to the fifo buffer.
len	the size of the pbuf element to write.

References ksz8851snl_master, and spi_write_buffer_wait().

Referenced by ksz8851snl_update().

void ksz8851_fifo_write_begin

(

uint32_t

tot_len

)

Start to write internal fifo buffer.

Parameters

tot_len

the total amount of data to write.

References FIFO_WRITE, ksz8851snl_master, ksz8851snl_slave, spi_select_slave(), and spi_write_buffer_wait().

Referenced by ksz8851snl_update().

void ksz8851_fifo_write_end

(

uint32_t

pad

)

Complete write operation.

Parameters

pad	amount of dummy data (bytes) to write to keep 32 bits alignment in the internal FIFO.

References ksz8851snl_master, ksz8851snl_slave, spi_select_slave(), and spi_write_buffer_wait().

Referenced by ksz8851snl_update().

void ksz8851_reg_clrbits	(	uint16_t	reg,
		uint16_t	bits_to_clr
	)

Read register content, clear bitmask and write back to register.

Parameters

reg	the register address to modify.
bits_to_set	bitmask to apply.

References ksz8851_reg_read(), and ksz8851_reg_write().

Referenced by ksz8851snl_init(), and ksz8851snl_update().

uint16_t ksz8851_reg_read

(

uint16_t

reg

)

Read a register value.

Parameters

reg	the register address to modify.

Returns

the register value.

References CMD_READ, ksz8851snl_master, ksz8851snl_slave, REG_ADDR_MASK, spi_select_slave(), and spi_transceive_buffer_wait().

Referenced by ksz8851_reg_clrbits(), ksz8851_reg_setbits(), ksz8851snl_init(), and ksz8851snl_update().

void ksz8851_reg_setbits	(	uint16_t	reg,
		uint16_t	bits_to_set
	)

Read register content, set bitmask and write back to register.

Parameters

reg	the register address to modify.
bits_to_set	bitmask to apply.

References ksz8851_reg_read(), and ksz8851_reg_write().

Referenced by ksz8851snl_init(), and ksz8851snl_update().

void ksz8851_reg_write	(	uint16_t	reg,
		uint16_t	wrdata
	)

Write a register value.

Parameters

reg	the register address to modify.
wrdata	the new register value.

References CMD_WRITE, ksz8851snl_master, ksz8851snl_slave, REG_ADDR_MASK, spi_select_slave(), and spi_transceive_buffer_wait().

Referenced by ksz8851_reg_clrbits(), ksz8851_reg_setbits(), ksz8851snl_init(), and ksz8851snl_update().

uint32_t ksz8851snl_init

(

void

)

Initialize the PHY controller.

Call this function to initialize the hardware interface and the PHY controller. When initialization is done the PHY is turned on and ready to receive data.

References ADDR_PTR_AUTO_INC, BUS_CLOCK_166, BUS_CLOCK_DIVIDEDBY_1, CHIP_ID_8851_16, delay_init(), INT_RX, ksz8851_reg_clrbits(), ksz8851_reg_read(), ksz8851_reg_setbits(), ksz8851_reg_write(), ksz8851snl_hard_reset(), ksz8851snl_interface_init(), PORT_AUTO_NEG_RESTART, PORT_FORCE_FULL_DUPLEX, REG_BUS_CLOCK_CTRL, REG_CHIP_ID, REG_INT_MASK, REG_INT_STATUS, REG_MAC_ADDR_0, REG_MAC_ADDR_2, REG_MAC_ADDR_4, REG_PORT_CTRL, REG_RX_ADDR_PTR, REG_RX_CTRL1, REG_RX_CTRL2, REG_RX_FRAME_CNT_THRES, REG_RXQ_CMD, REG_TX_ADDR_PTR, REG_TX_CTRL, RX_CTRL_ALL_MULTICAST, RX_CTRL_BROADCAST, RX_CTRL_BURST_LEN_FRAME, RX_CTRL_ENABLE, RX_CTRL_FLOW_ENABLE, RX_CTRL_ICMP_CHECKSUM, RX_CTRL_IP_CHECKSUM, RX_CTRL_IPV6_UDP_NOCHECKSUM, RX_CTRL_MAC_FILTER, RX_CTRL_TCP_CHECKSUM, RX_CTRL_UDP_CHECKSUM, RX_CTRL_UDP_LITE_CHECKSUM, RX_CTRL_UNICAST, RXQ_CMD_CNTL, RXQ_TWOBYTE_OFFSET, TX_CTRL_CRC_ENABLE, TX_CTRL_ENABLE, TX_CTRL_FLOW_ENABLE, TX_CTRL_ICMP_CHECKSUM, TX_CTRL_IP_CHECKSUM, TX_CTRL_PAD_ENABLE, TX_CTRL_TCP_CHECKSUM, and TX_CTRL_UDP_CHECKSUM.

Referenced by ksz8851snl_low_level_init().

struct spi_module ksz8851snl_master

Referenced by ksz8851_fifo_read(), ksz8851_fifo_write(), ksz8851_fifo_write_begin(), ksz8851_fifo_write_end(), ksz8851_reg_read(), ksz8851_reg_write(), and ksz8851snl_interface_init().

struct spi_slave_inst ksz8851snl_slave

Referenced by ksz8851_fifo_read(), ksz8851_fifo_write_begin(), ksz8851_fifo_write_end(), ksz8851_reg_read(), ksz8851_reg_write(), and ksz8851snl_interface_init().