USBB Device Driver header file.
Copyright (c) 2009-2018 Microchip Technology Inc. and its subsidiaries.
Data Structures | |
struct | avr32_usbb_uddmax_t |
Access points to the USBB device DMA memory map with arrayed registers. More... | |
Macros | |
USBB Device IP properties | |
These macros give access to IP properties | |
#define | udd_get_endpoint_max_nbr() |
Get maximal number of endpoints. More... | |
USBB Device speeds management | |
#define | udd_low_speed_enable() USBB_SET_BITS(UDCON,LS) |
Enable/disable device low-speed mode. More... | |
#define | udd_low_speed_disable() USBB_CLR_BITS(UDCON,LS) |
#define | Is_udd_low_speed_enable() USBB_TST_BITS(UDCON,LS) |
Test if device low-speed mode is forced. More... | |
#define | udd_high_speed_enable() do { } while (0) |
#define | udd_high_speed_disable() do { } while (0) |
#define | Is_udd_full_speed_mode() true |
USBB device attach control | |
These macros manage the USBB Device attach. | |
#define | udd_detach_device() USBB_SET_BITS(UDCON,DETACH) |
detaches from USB bus More... | |
#define | udd_attach_device() USBB_CLR_BITS(UDCON,DETACH) |
attaches to USB bus More... | |
#define | Is_udd_detached() USBB_TST_BITS(UDCON,DETACH) |
test if the device is detached More... | |
USBB device bus events control | |
These macros manage the USBB Device bus events. | |
#define | udd_initiate_remote_wake_up() USBB_SET_BITS(UDCON,RMWKUP) |
Initiates a remote wake-up event. More... | |
#define | Is_udd_pending_remote_wake_up() USBB_TST_BITS(UDCON,RMWKUP) |
#define | udd_enable_remote_wake_up_interrupt() USBB_REG_SET(UDINTE,UPRSME) |
Manage upstream resume event (=remote wakeup from device) The USB driver sends a resume signal called "Upstream Resume". More... | |
#define | udd_disable_remote_wake_up_interrupt() USBB_REG_CLR(UDINTE,UPRSME) |
#define | Is_udd_remote_wake_up_interrupt_enabled() USBB_TST_BITS(UDINTE,UPRSME) |
#define | udd_ack_remote_wake_up_start() USBB_REG_CLR(UDINT,UPRSM) |
#define | udd_raise_remote_wake_up_start() USBB_REG_SET(UDINT,UPRSM) |
#define | Is_udd_remote_wake_up_start() USBB_TST_BITS(UDINT,UPRSM) |
#define | udd_enable_resume_interrupt() USBB_REG_SET(UDINTE,EORSME) |
Manage downstream resume event (=remote wakeup from host) The USB controller detects a valid "End of Resume" signal initiated by the host. More... | |
#define | udd_disable_resume_interrupt() USBB_REG_CLR(UDINTE,EORSME) |
#define | Is_udd_resume_interrupt_enabled() USBB_TST_BITS(UDINTE,EORSME) |
#define | udd_ack_resume() USBB_REG_CLR(UDINT,EORSM) |
#define | udd_raise_resume() USBB_REG_SET(UDINT,EORSM) |
#define | Is_udd_resume() USBB_TST_BITS(UDINT,EORSM) |
#define | udd_enable_wake_up_interrupt() USBB_REG_SET(UDINTE,WAKEUPE) |
Manage wake-up event (=usb line activity) The USB controller is reactivated by a filtered non-idle signal from the lines. More... | |
#define | udd_disable_wake_up_interrupt() USBB_REG_CLR(UDINTE,WAKEUPE) |
#define | Is_udd_wake_up_interrupt_enabled() USBB_TST_BITS(UDINTE,WAKEUPE) |
#define | udd_ack_wake_up() USBB_REG_CLR(UDINT,WAKEUP) |
#define | udd_raise_wake_up() USBB_REG_SET(UDINT,WAKEUP) |
#define | Is_udd_wake_up() USBB_TST_BITS(UDINT,WAKEUP) |
#define | udd_enable_reset_interrupt() USBB_REG_SET(UDINTE,EORSTE) |
Manage reset event Set when a USB "End of Reset" has been detected. More... | |
#define | udd_disable_reset_interrupt() USBB_REG_CLR(UDINTE,EORSTE) |
#define | Is_udd_reset_interrupt_enabled() USBB_TST_BITS(UDINTE,EORSTE) |
#define | udd_ack_reset() USBB_REG_CLR(UDINT,EORST) |
#define | udd_raise_reset() USBB_REG_SET(UDINT,EORST) |
#define | Is_udd_reset() USBB_TST_BITS(UDINT,EORST) |
#define | udd_enable_sof_interrupt() USBB_REG_SET(UDINTE,SOFE) |
Manage start of frame event. More... | |
#define | udd_disable_sof_interrupt() USBB_REG_CLR(UDINTE,SOFE) |
#define | Is_udd_sof_interrupt_enabled() USBB_TST_BITS(UDINTE,SOFE) |
#define | udd_ack_sof() USBB_REG_CLR(UDINT,SOF) |
#define | udd_raise_sof() USBB_REG_SET(UDINT,SOF) |
#define | Is_udd_sof() USBB_TST_BITS(UDINT,SOF) |
#define | udd_frame_number() (USBB_RD_BITFIELD(UDFNUM,FNUM)) |
#define | Is_udd_frame_number_crc_error() USBB_TST_BITS(UDFNUM,FNCERR) |
#define | udd_enable_msof_interrupt() USBB_REG_SET(UDINTE,MSOFE) |
Manage Micro start of frame event (High Speed Only) More... | |
#define | udd_disable_msof_interrupt() USBB_REG_CLR(UDINTE,MSOFE) |
#define | Is_udd_msof_interrupt_enabled() USBB_TST_BITS(UDINTE,MSOFE) |
#define | udd_ack_msof() USBB_REG_CLR(UDINT,MSOF) |
#define | udd_raise_msof() USBB_REG_SET(UDINT,MSOF) |
#define | Is_udd_msof() USBB_TST_BITS(UDINT,MSOF) |
#define | udd_micro_frame_number() |
#define | udd_enable_suspend_interrupt() USBB_REG_SET(UDINTE,SUSPE) |
Manage suspend event. More... | |
#define | udd_disable_suspend_interrupt() USBB_REG_CLR(UDINTE,SUSPE) |
#define | Is_udd_suspend_interrupt_enabled() USBB_TST_BITS(UDINTE,SUSPE) |
#define | udd_ack_suspend() USBB_REG_CLR(UDINT,SUSP) |
#define | udd_raise_suspend() USBB_REG_SET(UDINT,SUSP) |
#define | Is_udd_suspend() USBB_TST_BITS(UDINT,SUSP) |
USBB device address control | |
These macros manage the USBB Device address. | |
#define | udd_enable_address() USBB_SET_BITS(UDCON,ADDEN) |
enables USB device address More... | |
#define | udd_disable_address() USBB_CLR_BITS(UDCON,ADDEN) |
disables USB device address More... | |
#define | Is_udd_address_enabled() USBB_TST_BITS(UDCON,ADDEN) |
#define | udd_configure_address(addr) (USBB_WR_BITFIELD(UDCON,UADD, addr)) |
configures the USB device address More... | |
#define | udd_get_configured_address() (USBB_RD_BITFIELD(UDCON,UADD)) |
gets the currently configured USB device address More... | |
USBB Device endpoint drivers | |
These macros manage the common features of the endpoints. | |
#define | USBB_ARRAY(reg, index) (((volatile unsigned long*)(&AVR32_USBB.reg))[index]) |
Generic macro for USBB registers that can be arrayed. More... | |
#define | USBB_EP_CLR_BITS(reg, bit, ep) |
#define | USBB_EP_SET_BITS(reg, bit, ep) |
#define | USBB_EP_TST_BITS(reg, bit, ep) |
#define | USBB_EP_RD_BITFIELD(reg, bit, ep) |
#define | USBB_EP_WR_BITFIELD(reg, bit, ep, value) |
#define | USBB_EP_REG_CLR(reg, bit, ep) |
#define | USBB_EP_REG_SET(reg, bit, ep) |
USBB Device endpoint configuration | |
#define | udd_enable_endpoint(ep) (Set_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
enables the selected endpoint More... | |
#define | udd_disable_endpoint(ep) (Clr_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
disables the selected endpoint More... | |
#define | Is_udd_endpoint_enabled(ep) (Tst_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
tests if the selected endpoint is enabled More... | |
#define | udd_reset_endpoint(ep) |
resets the selected endpoint More... | |
#define | Is_udd_resetting_endpoint(ep) (Tst_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep))) |
tests if the selected endpoint is being reset More... | |
#define | udd_configure_endpoint_type(ep, type) USBB_EP_WR_BITFIELD(UECFG,EPTYPE,ep,type) |
configures the selected endpoint type More... | |
#define | udd_get_endpoint_type(ep) USBB_EP_RD_BITFIELD(UECFG,EPTYPE,ep) |
gets the configured selected endpoint type More... | |
#define | udd_enable_endpoint_bank_autoswitch(ep) USBB_EP_SET_BITS(UECFG,AUTOSW,ep) |
enables the bank autoswitch for the selected endpoint More... | |
#define | udd_disable_endpoint_bank_autoswitch(ep) USBB_EP_CLR_BITS(UECFG,AUTOSW,ep) |
disables the bank autoswitch for the selected endpoint More... | |
#define | Is_udd_endpoint_bank_autoswitch_enabled(ep) USBB_EP_TST_BITS(UECFG,AUTOSW,ep) |
#define | udd_configure_endpoint_direction(ep, dir) USBB_EP_WR_BITFIELD(UECFG,EPDIR,ep,dir) |
configures the selected endpoint direction More... | |
#define | udd_get_endpoint_direction(ep) USBB_EP_RD_BITFIELD(UECFG,EPDIR,ep) |
gets the configured selected endpoint direction More... | |
#define | Is_udd_endpoint_in(ep) USBB_EP_TST_BITS(UECFG,EPDIR,ep) |
#define | udd_format_endpoint_size(size) (32 - clz(((U32)min(max(size, 8), 1024) << 1) - 1) - 1 - 3) |
Bounds given integer size to allowed range and rounds it up to the nearest available greater size, then applies register format of USBB controller for endpoint size bit-field. More... | |
#define | udd_configure_endpoint_size(ep, size) USBB_EP_WR_BITFIELD(UECFG,EPSIZE,ep, udd_format_endpoint_size(size)) |
configures the selected endpoint size More... | |
#define | udd_get_endpoint_size(ep) (8<<USBB_EP_RD_BITFIELD(UECFG,EPSIZE,ep)) |
gets the configured selected endpoint size More... | |
#define | udd_configure_endpoint_bank(ep, bank) USBB_EP_WR_BITFIELD(UECFG,EPBK,ep,bank) |
configures the selected endpoint number of banks More... | |
#define | udd_get_endpoint_bank(ep) USBB_EP_RD_BITFIELD(UECFG,EPBK,ep) |
gets the configured selected endpoint number of banks More... | |
#define | udd_allocate_memory(ep) USBB_EP_SET_BITS(UECFG,ALLOC,ep) |
allocates the configuration selected endpoint in DPRAM memory More... | |
#define | udd_unallocate_memory(ep) USBB_EP_CLR_BITS(UECFG,ALLOC,ep) |
un-allocates the configuration selected endpoint in DPRAM memory More... | |
#define | Is_udd_memory_allocated(ep) USBB_EP_TST_BITS(UECFG,ALLOC,ep) |
#define | udd_configure_endpoint(ep, type, dir, size, bank) |
configures selected endpoint in one step More... | |
#define | Is_udd_endpoint_configured(ep) USBB_EP_TST_BITS(UESTA,CFGOK,ep) |
tests if current endpoint is configured More... | |
#define | udd_control_direction() (Rd_bitfield(USBB_ARRAY(uesta0(EP_CONTROL), AVR32_USBB_UESTA0_CTRLDIR_MASK)) |
returns the control direction More... | |
#define | udd_reset_data_toggle(ep) USBB_EP_REG_SET(UECON,RSTDT,ep) |
resets the data toggle sequence More... | |
#define | Is_udd_data_toggle_reset(ep) USBB_EP_TST_BITS(UECON,RSTDT,ep) |
tests if the data toggle sequence is being reset More... | |
#define | udd_data_toggle(ep) USBB_EP_RD_BITFIELD(UESTA,DTSEQ,ep) |
returns data toggle More... | |
USBB Device control endpoint interrupts | |
These macros control the endpoints interrupts. | |
#define | udd_enable_endpoint_interrupt(ep) (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_EP0INTES_MASK << (ep)) |
enables the selected endpoint interrupt More... | |
#define | udd_disable_endpoint_interrupt(ep) (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_EP0INTEC_MASK << (ep)) |
disables the selected endpoint interrupt More... | |
#define | Is_udd_endpoint_interrupt_enabled(ep) (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_EP0INTE_MASK << (ep))) |
tests if the selected endpoint interrupt is enabled More... | |
#define | Is_udd_endpoint_interrupt(ep) (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_EP0INT_MASK << (ep))) |
tests if an interrupt is triggered by the selected endpoint More... | |
#define | udd_get_interrupt_endpoint_number() |
returns the lowest endpoint number generating an endpoint interrupt or AVR32_USBB_EPT_NUM if none More... | |
USBB Device control endpoint errors | |
These macros control the endpoint errors. | |
#define | udd_enable_stall_handshake(ep) USBB_EP_REG_SET(UECON,STALLRQ,ep) |
enables the STALL handshake More... | |
#define | udd_disable_stall_handshake(ep) USBB_EP_REG_CLR(UECON,STALLRQ,ep) |
disables the STALL handshake More... | |
#define | Is_udd_endpoint_stall_requested(ep) USBB_EP_TST_BITS(UECON,STALLRQ,ep) |
tests if STALL handshake request is running More... | |
#define | Is_udd_stall(ep) USBB_EP_TST_BITS(UESTA,STALLEDI,ep) |
tests if STALL sent More... | |
#define | udd_ack_stall(ep) USBB_EP_REG_CLR(UESTA,STALLEDI,ep) |
acks STALL sent More... | |
#define | udd_raise_stall(ep) USBB_EP_REG_SET(UESTA,STALLEDI,ep) |
raises STALL sent More... | |
#define | udd_enable_stall_interrupt(ep) USBB_EP_REG_SET(UECON,STALLEDE,ep) |
enables STALL sent interrupt More... | |
#define | udd_disable_stall_interrupt(ep) USBB_EP_REG_CLR(UECON,STALLEDE,ep) |
disables STALL sent interrupt More... | |
#define | Is_udd_stall_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,STALLEDE,ep) |
tests if STALL sent interrupt is enabled More... | |
#define | Is_udd_nak_out(ep) USBB_EP_TST_BITS(UESTA,NAKOUTI,ep) |
tests if NAK OUT received More... | |
#define | udd_ack_nak_out(ep) USBB_EP_REG_CLR(UESTA,NAKOUTI,ep) |
acks NAK OUT received More... | |
#define | udd_raise_nak_out(ep) USBB_EP_REG_SET(UESTA,NAKOUTI,ep) |
raises NAK OUT received More... | |
#define | udd_enable_nak_out_interrupt(ep) USBB_EP_REG_SET(UECON,NAKOUTE,ep) |
enables NAK OUT interrupt More... | |
#define | udd_disable_nak_out_interrupt(ep) USBB_EP_REG_CLR(UECON,NAKOUTE,ep) |
disables NAK OUT interrupt More... | |
#define | Is_udd_nak_out_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,NAKOUTE,ep) |
tests if NAK OUT interrupt is enabled More... | |
#define | Is_udd_nak_in(ep) USBB_EP_TST_BITS(UESTA,NAKINI,ep) |
tests if NAK IN received More... | |
#define | udd_ack_nak_in(ep) USBB_EP_REG_CLR(UESTA,NAKINI,ep) |
acks NAK IN received More... | |
#define | udd_raise_nak_in(ep) USBB_EP_REG_SET(UESTA,NAKINI,ep) |
raises NAK IN received More... | |
#define | udd_enable_nak_in_interrupt(ep) USBB_EP_REG_SET(UECON,NAKINE,ep) |
enables NAK IN interrupt More... | |
#define | udd_disable_nak_in_interrupt(ep) USBB_EP_REG_CLR(UECON,NAKINE,ep) |
disables NAK IN interrupt More... | |
#define | Is_udd_nak_in_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,NAKINE,ep) |
tests if NAK IN interrupt is enabled More... | |
#define | udd_ack_overflow_interrupt(ep) USBB_EP_REG_CLR(UESTA,OVERFI,ep) |
acks endpoint isochronous overflow interrupt More... | |
#define | udd_raise_overflow_interrupt(ep) USBB_EP_REG_SET(UESTA,OVERFI,ep) |
raises endpoint isochronous overflow interrupt More... | |
#define | Is_udd_overflow(ep) USBB_EP_TST_BITS(UESTA,OVERFI,ep) |
tests if an overflow occurs More... | |
#define | udd_enable_overflow_interrupt(ep) USBB_EP_REG_SET(UECON,OVERFE,ep) |
enables overflow interrupt More... | |
#define | udd_disable_overflow_interrupt(ep) USBB_EP_REG_CLR(UECON,OVERFE,ep) |
disables overflow interrupt More... | |
#define | Is_udd_overflow_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,OVERFE,ep) |
tests if overflow interrupt is enabled More... | |
#define | udd_ack_underflow_interrupt(ep) USBB_EP_REG_CLR(UESTA,UNDERFI,ep) |
acks endpoint isochronous underflow interrupt More... | |
#define | udd_raise_underflow_interrupt(ep) USBB_EP_REG_SET(UESTA,UNDERFI,ep) |
raises endpoint isochronous underflow interrupt More... | |
#define | Is_udd_underflow(ep) USBB_EP_TST_BITS(UESTA,UNDERFI,ep) |
tests if an underflow occurs More... | |
#define | udd_enable_underflow_interrupt(ep) USBB_EP_REG_SET(UECON,RXSTPE,ep) |
enables underflow interrupt More... | |
#define | udd_disable_underflow_interrupt(ep) USBB_EP_REG_CLR(UECON,RXSTPE,ep) |
disables underflow interrupt More... | |
#define | Is_udd_underflow_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,RXSTPE,ep) |
tests if underflow interrupt is enabled More... | |
#define | Is_udd_crc_error(ep) USBB_EP_TST_BITS(UESTA,STALLEDI,ep) |
tests if CRC ERROR ISO OUT detected More... | |
#define | udd_ack_crc_error(ep) USBB_EP_REG_CLR(UESTA,STALLEDI,ep) |
acks CRC ERROR ISO OUT detected More... | |
#define | udd_raise_crc_error(ep) USBB_EP_REG_SET(UESTA,STALLEDI,ep) |
raises CRC ERROR ISO OUT detected More... | |
#define | udd_enable_crc_error_interrupt(ep) USBB_EP_REG_SET(UECON,STALLEDE,ep) |
enables CRC ERROR ISO OUT detected interrupt More... | |
#define | udd_disable_crc_error_interrupt(ep) USBB_EP_REG_CLR(UECON,STALLEDE,ep) |
disables CRC ERROR ISO OUT detected interrupt More... | |
#define | Is_udd_crc_error_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,STALLEDE,ep) |
tests if CRC ERROR ISO OUT detected interrupt is enabled More... | |
USBB Device control endpoint transfer | |
These macros control the endpoint transfer. | |
#define | Is_udd_read_enabled(ep) USBB_EP_TST_BITS(UESTA,RWALL,ep) |
tests if endpoint read allowed More... | |
#define | Is_udd_write_enabled(ep) USBB_EP_TST_BITS(UESTA,RWALL,ep) |
tests if endpoint write allowed More... | |
#define | udd_byte_count(ep) USBB_EP_RD_BITFIELD(UESTA,BYCT,ep) |
returns the byte count More... | |
#define | udd_ack_fifocon(ep) USBB_EP_REG_CLR(UECON,FIFOCON,ep) |
clears FIFOCON bit More... | |
#define | Is_udd_fifocon(ep) USBB_EP_TST_BITS(UECON,FIFOCON,ep) |
tests if FIFOCON bit set More... | |
#define | udd_nb_busy_bank(ep) USBB_EP_RD_BITFIELD(UESTA,NBUSYBK,ep) |
returns the number of busy banks More... | |
#define | udd_current_bank(ep) USBB_EP_RD_BITFIELD(UESTA,CURRBK,ep) |
returns the number of the current bank More... | |
#define | udd_kill_last_in_bank(ep) USBB_EP_REG_SET(UECON,KILLBK,ep) |
kills last bank More... | |
#define | Is_udd_killing_last_in_bank(ep) USBB_EP_TST_BITS(UECON,KILLBK,ep) |
tests if last bank killed More... | |
#define | udd_force_bank_interrupt(ep) USBB_EP_REG_SET(UESTA,NBUSYBK,ep) |
forces all banks full (OUT) or free (IN) interrupt More... | |
#define | udd_unforce_bank_interrupt(ep) USBB_EP_REG_SET(UESTA,NBUSYBK,ep) |
unforces all banks full (OUT) or free (IN) interrupt More... | |
#define | udd_enable_bank_interrupt(ep) USBB_EP_REG_SET(UECON,NBUSYBKE,ep) |
enables all banks full (OUT) or free (IN) interrupt More... | |
#define | udd_disable_bank_interrupt(ep) USBB_EP_REG_CLR(UECON,NBUSYBKE,ep) |
disables all banks full (OUT) or free (IN) interrupt More... | |
#define | Is_udd_bank_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,NBUSYBKE,ep) |
tests if all banks full (OUT) or free (IN) interrupt enabled More... | |
#define | Is_udd_short_packet(ep) USBB_EP_TST_BITS(UESTA,SHORTPACKETI,ep) |
tests if SHORT PACKET received More... | |
#define | udd_ack_short_packet(ep) USBB_EP_REG_CLR(UESTA,SHORTPACKETI,ep) |
acks SHORT PACKET received More... | |
#define | udd_raise_short_packet(ep) USBB_EP_REG_SET(UESTA,SHORTPACKETI,ep) |
raises SHORT PACKET received More... | |
#define | udd_enable_short_packet_interrupt(ep) USBB_EP_REG_SET(UECON,SHORTPACKETE,ep) |
enables SHORT PACKET received interrupt More... | |
#define | udd_disable_short_packet_interrupt(ep) USBB_EP_REG_CLR(UECON,SHORTPACKETE,ep) |
disables SHORT PACKET received interrupt More... | |
#define | Is_udd_short_packet_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,SHORTPACKETE,ep) |
tests if SHORT PACKET received interrupt is enabled More... | |
#define | Is_udd_setup_received(ep) USBB_EP_TST_BITS(UESTA,RXSTPI,ep) |
tests if SETUP received More... | |
#define | udd_ack_setup_received(ep) USBB_EP_REG_CLR(UESTA,RXSTPI,ep) |
acks SETUP received More... | |
#define | udd_raise_setup_received(ep) USBB_EP_REG_SET(UESTA,RXSTPI,ep) |
raises SETUP received More... | |
#define | udd_enable_setup_received_interrupt(ep) USBB_EP_REG_SET(UECON,RXSTPE,ep) |
enables SETUP received interrupt More... | |
#define | udd_disable_setup_received_interrupt(ep) USBB_EP_REG_CLR(UECON,RXSTPE,ep) |
disables SETUP received interrupt More... | |
#define | Is_udd_setup_received_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,RXSTPE,ep) |
tests if SETUP received interrupt is enabled More... | |
#define | Is_udd_out_received(ep) USBB_EP_TST_BITS(UESTA,RXOUTI,ep) |
tests if OUT received More... | |
#define | udd_ack_out_received(ep) USBB_EP_REG_CLR(UESTA,RXOUTI,ep) |
acks OUT received More... | |
#define | udd_raise_out_received(ep) USBB_EP_REG_SET(UESTA,RXOUTI,ep) |
raises OUT received More... | |
#define | udd_enable_out_received_interrupt(ep) USBB_EP_REG_SET(UECON,RXOUTE,ep) |
enables OUT received interrupt More... | |
#define | udd_disable_out_received_interrupt(ep) USBB_EP_REG_CLR(UECON,RXOUTE,ep) |
disables OUT received interrupt More... | |
#define | Is_udd_out_received_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,RXOUTE,ep) |
tests if OUT received interrupt is enabled More... | |
#define | Is_udd_in_send(ep) USBB_EP_TST_BITS(UESTA,TXINI,ep) |
tests if IN sending More... | |
#define | udd_ack_in_send(ep) USBB_EP_REG_CLR(UESTA,TXINI,ep) |
acks IN sending More... | |
#define | udd_raise_in_send(ep) USBB_EP_REG_SET(UESTA,TXINI,ep) |
raises IN sending More... | |
#define | udd_enable_in_send_interrupt(ep) USBB_EP_REG_SET(UECON,TXINE,ep) |
enables IN sending interrupt More... | |
#define | udd_disable_in_send_interrupt(ep) USBB_EP_REG_CLR(UECON,TXINE,ep) |
disables IN sending interrupt More... | |
#define | Is_udd_in_send_interrupt_enabled(ep) USBB_EP_TST_BITS(UECON,TXINE,ep) |
tests if IN sending interrupt is enabled More... | |
#define | udd_get_endpoint_fifo_access(ep, scale) (((volatile TPASTE2(U, scale) (*)[0x10000 / ((scale) / 8)])AVR32_USBB_SLAVE)[(ep)]) |
Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint. More... | |
USBB endpoint DMA drivers | |
These macros manage the common features of the endpoint DMA channels. | |
#define | UDD_ENDPOINT_MAX_TRANS 0x10000 |
Maximum transfer size on USB DMA. More... | |
#define | udd_enable_endpoint_int_dis_hdma_req(ep) USBB_EP_REG_SET(UECON,EPDISHDMA,ep) |
#define | udd_disable_endpoint_int_dis_hdma_req(ep) USBB_EP_REG_CLR(UECON,EPDISHDMA,ep) |
#define | Is_udd_endpoint_int_dis_hdma_req_enabled(ep) USBB_EP_TST_BITS(UECON,EPDISHDMA,ep) |
#define | udd_raise_endpoint_dma_interrupt(ep) (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_DMA1INTS_MASK << ((ep) - 1)) |
#define | udd_clear_endpoint_dma_interrupt(ep) (AVR32_USBB.udintclr = AVR32_USBB_UDINTSET_DMA1INTS_MASK << ((ep) - 1)) |
#define | Is_udd_endpoint_dma_interrupt(ep) (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_DMA1INT_MASK << ((ep) - 1))) |
#define | udd_enable_endpoint_dma_interrupt(ep) (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_DMA1INTES_MASK << ((ep) - 1)) |
#define | udd_disable_endpoint_dma_interrupt(ep) (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_DMA1INTEC_MASK << ((ep) - 1)) |
#define | Is_udd_endpoint_dma_interrupt_enabled(ep) (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_DMA1INTE_MASK << ((ep) - 1))) |
#define | USBB_UDDMA_ARRAY(ep) (((volatile avr32_usbb_uddmax_t *)&AVR32_USBB.uddma1_nextdesc)[(ep) - 1]) |
Structure for DMA registers. More... | |
#define | udd_endpoint_dma_set_control(ep, desc) (USBB_UDDMA_ARRAY(ep).control=desc) |
Set control desc to selected endpoint DMA channel. More... | |
#define | udd_endpoint_dma_get_control(ep) (USBB_UDDMA_ARRAY(ep).control) |
Get control desc to selected endpoint DMA channel. More... | |
#define | udd_endpoint_dma_set_addr(ep, add) (USBB_UDDMA_ARRAY(ep).addr=add) |
Set RAM address to selected endpoint DMA channel. More... | |
#define | udd_endpoint_dma_get_status(ep) (USBB_UDDMA_ARRAY(ep).status) |
Get status to selected endpoint DMA channel. More... | |
#define Is_udd_address_enabled | ( | ) | USBB_TST_BITS(UDCON,ADDEN) |
#define Is_udd_bank_interrupt_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,NBUSYBKE,ep) |
tests if all banks full (OUT) or free (IN) interrupt enabled
#define Is_udd_crc_error | ( | ep | ) | USBB_EP_TST_BITS(UESTA,STALLEDI,ep) |
tests if CRC ERROR ISO OUT detected
#define Is_udd_crc_error_interrupt_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,STALLEDE,ep) |
tests if CRC ERROR ISO OUT detected interrupt is enabled
#define Is_udd_data_toggle_reset | ( | ep | ) | USBB_EP_TST_BITS(UECON,RSTDT,ep) |
tests if the data toggle sequence is being reset
#define Is_udd_endpoint_bank_autoswitch_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECFG,AUTOSW,ep) |
#define Is_udd_endpoint_configured | ( | ep | ) | USBB_EP_TST_BITS(UESTA,CFGOK,ep) |
tests if current endpoint is configured
#define Is_udd_endpoint_dma_interrupt | ( | ep | ) | (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_DMA1INT_MASK << ((ep) - 1))) |
#define Is_udd_endpoint_dma_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_DMA1INTE_MASK << ((ep) - 1))) |
#define Is_udd_endpoint_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
tests if the selected endpoint is enabled
#define Is_udd_endpoint_in | ( | ep | ) | USBB_EP_TST_BITS(UECFG,EPDIR,ep) |
#define Is_udd_endpoint_int_dis_hdma_req_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,EPDISHDMA,ep) |
#define Is_udd_endpoint_interrupt | ( | ep | ) | (Tst_bits(AVR32_USBB.udint, AVR32_USBB_UDINT_EP0INT_MASK << (ep))) |
tests if an interrupt is triggered by the selected endpoint
Referenced by udd_ctrl_interrupt().
#define Is_udd_endpoint_interrupt_enabled | ( | ep | ) | (Tst_bits(AVR32_USBB.udinte, AVR32_USBB_UDINTE_EP0INTE_MASK << (ep))) |
tests if the selected endpoint interrupt is enabled
#define Is_udd_endpoint_stall_requested | ( | ep | ) | USBB_EP_TST_BITS(UECON,STALLRQ,ep) |
tests if STALL handshake request is running
#define Is_udd_fifocon | ( | ep | ) | USBB_EP_TST_BITS(UECON,FIFOCON,ep) |
tests if FIFOCON bit set
#define Is_udd_in_send | ( | ep | ) | USBB_EP_TST_BITS(UESTA,TXINI,ep) |
tests if IN sending
Referenced by udd_ctrl_interrupt(), and udd_ctrl_overflow().
#define Is_udd_in_send_interrupt_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,TXINE,ep) |
tests if IN sending interrupt is enabled
Referenced by udd_ctrl_interrupt().
#define Is_udd_killing_last_in_bank | ( | ep | ) | USBB_EP_TST_BITS(UECON,KILLBK,ep) |
tests if last bank killed
#define Is_udd_memory_allocated | ( | ep | ) | USBB_EP_TST_BITS(UECFG,ALLOC,ep) |
#define Is_udd_nak_in | ( | ep | ) | USBB_EP_TST_BITS(UESTA,NAKINI,ep) |
tests if NAK IN received
Referenced by udd_ctrl_interrupt().
#define Is_udd_nak_in_interrupt_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,NAKINE,ep) |
tests if NAK IN interrupt is enabled
#define Is_udd_nak_out | ( | ep | ) | USBB_EP_TST_BITS(UESTA,NAKOUTI,ep) |
tests if NAK OUT received
Referenced by udd_ctrl_interrupt().
#define Is_udd_nak_out_interrupt_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,NAKOUTE,ep) |
tests if NAK OUT interrupt is enabled
#define Is_udd_out_received | ( | ep | ) | USBB_EP_TST_BITS(UESTA,RXOUTI,ep) |
tests if OUT received
Referenced by udd_ctrl_in_sent(), udd_ctrl_interrupt(), and udd_ctrl_underflow().
#define Is_udd_out_received_interrupt_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,RXOUTE,ep) |
tests if OUT received interrupt is enabled
#define Is_udd_overflow | ( | ep | ) | USBB_EP_TST_BITS(UESTA,OVERFI,ep) |
tests if an overflow occurs
#define Is_udd_overflow_interrupt_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,OVERFE,ep) |
tests if overflow interrupt is enabled
#define Is_udd_read_enabled | ( | ep | ) | USBB_EP_TST_BITS(UESTA,RWALL,ep) |
tests if endpoint read allowed
#define Is_udd_resetting_endpoint | ( | ep | ) | (Tst_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPRST0_MASK << (ep))) |
tests if the selected endpoint is being reset
#define Is_udd_setup_received | ( | ep | ) | USBB_EP_TST_BITS(UESTA,RXSTPI,ep) |
tests if SETUP received
Referenced by udd_ctrl_interrupt().
#define Is_udd_setup_received_interrupt_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,RXSTPE,ep) |
tests if SETUP received interrupt is enabled
#define Is_udd_short_packet | ( | ep | ) | USBB_EP_TST_BITS(UESTA,SHORTPACKETI,ep) |
tests if SHORT PACKET received
#define Is_udd_short_packet_interrupt_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,SHORTPACKETE,ep) |
tests if SHORT PACKET received interrupt is enabled
#define Is_udd_stall | ( | ep | ) | USBB_EP_TST_BITS(UESTA,STALLEDI,ep) |
tests if STALL sent
#define Is_udd_stall_interrupt_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,STALLEDE,ep) |
tests if STALL sent interrupt is enabled
#define Is_udd_underflow | ( | ep | ) | USBB_EP_TST_BITS(UESTA,UNDERFI,ep) |
tests if an underflow occurs
#define Is_udd_underflow_interrupt_enabled | ( | ep | ) | USBB_EP_TST_BITS(UECON,RXSTPE,ep) |
tests if underflow interrupt is enabled
#define Is_udd_write_enabled | ( | ep | ) | USBB_EP_TST_BITS(UESTA,RWALL,ep) |
tests if endpoint write allowed
#define udd_ack_crc_error | ( | ep | ) | USBB_EP_REG_CLR(UESTA,STALLEDI,ep) |
acks CRC ERROR ISO OUT detected
#define udd_ack_fifocon | ( | ep | ) | USBB_EP_REG_CLR(UECON,FIFOCON,ep) |
clears FIFOCON bit
#define udd_ack_in_send | ( | ep | ) | USBB_EP_REG_CLR(UESTA,TXINI,ep) |
acks IN sending
Referenced by udd_ctrl_in_sent(), and udd_ctrl_send_zlp_in().
#define udd_ack_nak_in | ( | ep | ) | USBB_EP_REG_CLR(UESTA,NAKINI,ep) |
acks NAK IN received
Referenced by udd_ctrl_interrupt(), udd_ctrl_out_received(), udd_ctrl_send_zlp_out(), and udd_ctrl_setup_received().
#define udd_ack_nak_out | ( | ep | ) | USBB_EP_REG_CLR(UESTA,NAKOUTI,ep) |
acks NAK OUT received
Referenced by udd_ctrl_interrupt(), and udd_ctrl_send_zlp_in().
#define udd_ack_out_received | ( | ep | ) | USBB_EP_REG_CLR(UESTA,RXOUTI,ep) |
acks OUT received
Referenced by udd_ctrl_init(), and udd_ctrl_out_received().
#define udd_ack_overflow_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UESTA,OVERFI,ep) |
acks endpoint isochronous overflow interrupt
#define udd_ack_setup_received | ( | ep | ) | USBB_EP_REG_CLR(UESTA,RXSTPI,ep) |
acks SETUP received
Referenced by udd_ctrl_setup_received().
#define udd_ack_short_packet | ( | ep | ) | USBB_EP_REG_CLR(UESTA,SHORTPACKETI,ep) |
acks SHORT PACKET received
#define udd_ack_stall | ( | ep | ) | USBB_EP_REG_CLR(UESTA,STALLEDI,ep) |
acks STALL sent
#define udd_ack_underflow_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UESTA,UNDERFI,ep) |
acks endpoint isochronous underflow interrupt
#define udd_allocate_memory | ( | ep | ) | USBB_EP_SET_BITS(UECFG,ALLOC,ep) |
allocates the configuration selected endpoint in DPRAM memory
Referenced by udd_reset_ep_ctrl().
#define udd_byte_count | ( | ep | ) | USBB_EP_RD_BITFIELD(UESTA,BYCT,ep) |
returns the byte count
Referenced by udd_ctrl_out_received(), and udd_ctrl_setup_received().
#define udd_clear_endpoint_dma_interrupt | ( | ep | ) | (AVR32_USBB.udintclr = AVR32_USBB_UDINTSET_DMA1INTS_MASK << ((ep) - 1)) |
#define udd_configure_address | ( | addr | ) | (USBB_WR_BITFIELD(UDCON,UADD, addr)) |
configures the USB device address
Referenced by udd_reset_ep_ctrl(), and udd_set_address().
#define udd_configure_endpoint | ( | ep, | |
type, | |||
dir, | |||
size, | |||
bank | |||
) |
configures selected endpoint in one step
Referenced by udd_reset_ep_ctrl().
#define udd_configure_endpoint_bank | ( | ep, | |
bank | |||
) | USBB_EP_WR_BITFIELD(UECFG,EPBK,ep,bank) |
configures the selected endpoint number of banks
#define udd_configure_endpoint_direction | ( | ep, | |
dir | |||
) | USBB_EP_WR_BITFIELD(UECFG,EPDIR,ep,dir) |
configures the selected endpoint direction
#define udd_configure_endpoint_size | ( | ep, | |
size | |||
) | USBB_EP_WR_BITFIELD(UECFG,EPSIZE,ep, udd_format_endpoint_size(size)) |
configures the selected endpoint size
#define udd_configure_endpoint_type | ( | ep, | |
type | |||
) | USBB_EP_WR_BITFIELD(UECFG,EPTYPE,ep,type) |
configures the selected endpoint type
#define udd_control_direction | ( | ) | (Rd_bitfield(USBB_ARRAY(uesta0(EP_CONTROL), AVR32_USBB_UESTA0_CTRLDIR_MASK)) |
returns the control direction
#define udd_current_bank | ( | ep | ) | USBB_EP_RD_BITFIELD(UESTA,CURRBK,ep) |
returns the number of the current bank
#define udd_data_toggle | ( | ep | ) | USBB_EP_RD_BITFIELD(UESTA,DTSEQ,ep) |
returns data toggle
#define udd_disable_address | ( | ) | USBB_CLR_BITS(UDCON,ADDEN) |
disables USB device address
Referenced by udd_set_address().
#define udd_disable_bank_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UECON,NBUSYBKE,ep) |
disables all banks full (OUT) or free (IN) interrupt
#define udd_disable_crc_error_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UECON,STALLEDE,ep) |
disables CRC ERROR ISO OUT detected interrupt
#define udd_disable_endpoint | ( | ep | ) | (Clr_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
disables the selected endpoint
#define udd_disable_endpoint_bank_autoswitch | ( | ep | ) | USBB_EP_CLR_BITS(UECFG,AUTOSW,ep) |
disables the bank autoswitch for the selected endpoint
#define udd_disable_endpoint_dma_interrupt | ( | ep | ) | (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_DMA1INTEC_MASK << ((ep) - 1)) |
#define udd_disable_endpoint_int_dis_hdma_req | ( | ep | ) | USBB_EP_REG_CLR(UECON,EPDISHDMA,ep) |
#define udd_disable_endpoint_interrupt | ( | ep | ) | (AVR32_USBB.udinteclr = AVR32_USBB_UDINTECLR_EP0INTEC_MASK << (ep)) |
disables the selected endpoint interrupt
#define udd_disable_in_send_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UECON,TXINE,ep) |
disables IN sending interrupt
Referenced by udd_ctrl_in_sent(), and udd_ctrl_init().
#define udd_disable_nak_in_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UECON,NAKINE,ep) |
disables NAK IN interrupt
Referenced by udd_ctrl_interrupt().
#define udd_disable_nak_out_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UECON,NAKOUTE,ep) |
disables NAK OUT interrupt
Referenced by udd_ctrl_interrupt().
#define udd_disable_out_received_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UECON,RXOUTE,ep) |
disables OUT received interrupt
#define udd_disable_overflow_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UECON,OVERFE,ep) |
disables overflow interrupt
#define udd_disable_setup_received_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UECON,RXSTPE,ep) |
disables SETUP received interrupt
#define udd_disable_short_packet_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UECON,SHORTPACKETE,ep) |
disables SHORT PACKET received interrupt
#define udd_disable_stall_handshake | ( | ep | ) | USBB_EP_REG_CLR(UECON,STALLRQ,ep) |
disables the STALL handshake
#define udd_disable_stall_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UECON,STALLEDE,ep) |
disables STALL sent interrupt
#define udd_disable_underflow_interrupt | ( | ep | ) | USBB_EP_REG_CLR(UECON,RXSTPE,ep) |
disables underflow interrupt
#define udd_enable_address | ( | ) | USBB_SET_BITS(UDCON,ADDEN) |
enables USB device address
Referenced by udd_reset_ep_ctrl(), and udd_set_address().
#define udd_enable_bank_interrupt | ( | ep | ) | USBB_EP_REG_SET(UECON,NBUSYBKE,ep) |
enables all banks full (OUT) or free (IN) interrupt
#define udd_enable_crc_error_interrupt | ( | ep | ) | USBB_EP_REG_SET(UECON,STALLEDE,ep) |
enables CRC ERROR ISO OUT detected interrupt
#define udd_enable_endpoint | ( | ep | ) | (Set_bits(AVR32_USBB.uerst, AVR32_USBB_UERST_EPEN0_MASK << (ep))) |
enables the selected endpoint
Referenced by udd_reset_ep_ctrl().
#define udd_enable_endpoint_bank_autoswitch | ( | ep | ) | USBB_EP_SET_BITS(UECFG,AUTOSW,ep) |
enables the bank autoswitch for the selected endpoint
#define udd_enable_endpoint_dma_interrupt | ( | ep | ) | (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_DMA1INTES_MASK << ((ep) - 1)) |
#define udd_enable_endpoint_int_dis_hdma_req | ( | ep | ) | USBB_EP_REG_SET(UECON,EPDISHDMA,ep) |
#define udd_enable_endpoint_interrupt | ( | ep | ) | (AVR32_USBB.udinteset = AVR32_USBB_UDINTESET_EP0INTES_MASK << (ep)) |
enables the selected endpoint interrupt
Referenced by udd_reset_ep_ctrl().
#define udd_enable_in_send_interrupt | ( | ep | ) | USBB_EP_REG_SET(UECON,TXINE,ep) |
enables IN sending interrupt
Referenced by udd_ctrl_in_sent(), and udd_ctrl_send_zlp_in().
#define udd_enable_nak_in_interrupt | ( | ep | ) | USBB_EP_REG_SET(UECON,NAKINE,ep) |
enables NAK IN interrupt
Referenced by udd_ctrl_out_received(), udd_ctrl_send_zlp_out(), and udd_ctrl_setup_received().
#define udd_enable_nak_out_interrupt | ( | ep | ) | USBB_EP_REG_SET(UECON,NAKOUTE,ep) |
enables NAK OUT interrupt
Referenced by udd_ctrl_send_zlp_in().
#define udd_enable_out_received_interrupt | ( | ep | ) | USBB_EP_REG_SET(UECON,RXOUTE,ep) |
enables OUT received interrupt
Referenced by udd_reset_ep_ctrl().
#define udd_enable_overflow_interrupt | ( | ep | ) | USBB_EP_REG_SET(UECON,OVERFE,ep) |
enables overflow interrupt
#define udd_enable_setup_received_interrupt | ( | ep | ) | USBB_EP_REG_SET(UECON,RXSTPE,ep) |
enables SETUP received interrupt
Referenced by udd_reset_ep_ctrl().
#define udd_enable_short_packet_interrupt | ( | ep | ) | USBB_EP_REG_SET(UECON,SHORTPACKETE,ep) |
enables SHORT PACKET received interrupt
#define udd_enable_stall_handshake | ( | ep | ) | USBB_EP_REG_SET(UECON,STALLRQ,ep) |
enables the STALL handshake
Referenced by udd_ctrl_overflow(), udd_ctrl_stall_data(), and udd_ctrl_underflow().
#define udd_enable_stall_interrupt | ( | ep | ) | USBB_EP_REG_SET(UECON,STALLEDE,ep) |
enables STALL sent interrupt
#define udd_enable_underflow_interrupt | ( | ep | ) | USBB_EP_REG_SET(UECON,RXSTPE,ep) |
enables underflow interrupt
#define udd_endpoint_dma_get_control | ( | ep | ) | (USBB_UDDMA_ARRAY(ep).control) |
Get control desc to selected endpoint DMA channel.
#define udd_endpoint_dma_get_status | ( | ep | ) | (USBB_UDDMA_ARRAY(ep).status) |
Get status to selected endpoint DMA channel.
#define udd_endpoint_dma_set_addr | ( | ep, | |
add | |||
) | (USBB_UDDMA_ARRAY(ep).addr=add) |
Set RAM address to selected endpoint DMA channel.
#define udd_endpoint_dma_set_control | ( | ep, | |
desc | |||
) | (USBB_UDDMA_ARRAY(ep).control=desc) |
Set control desc to selected endpoint DMA channel.
#define UDD_ENDPOINT_MAX_TRANS 0x10000 |
Maximum transfer size on USB DMA.
#define udd_force_bank_interrupt | ( | ep | ) | USBB_EP_REG_SET(UESTA,NBUSYBK,ep) |
forces all banks full (OUT) or free (IN) interrupt
#define udd_format_endpoint_size | ( | size | ) | (32 - clz(((U32)min(max(size, 8), 1024) << 1) - 1) - 1 - 3) |
Bounds given integer size to allowed range and rounds it up to the nearest available greater size, then applies register format of USBB controller for endpoint size bit-field.
#define udd_get_configured_address | ( | ) | (USBB_RD_BITFIELD(UDCON,UADD)) |
gets the currently configured USB device address
Referenced by udd_getaddress().
#define udd_get_endpoint_bank | ( | ep | ) | USBB_EP_RD_BITFIELD(UECFG,EPBK,ep) |
gets the configured selected endpoint number of banks
#define udd_get_endpoint_direction | ( | ep | ) | USBB_EP_RD_BITFIELD(UECFG,EPDIR,ep) |
gets the configured selected endpoint direction
#define udd_get_endpoint_fifo_access | ( | ep, | |
scale | |||
) | (((volatile TPASTE2(U, scale) (*)[0x10000 / ((scale) / 8)])AVR32_USBB_SLAVE)[(ep)]) |
Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint.
ep | Endpoint of which to access FIFO data register |
scale | Data scale in bits: 64, 32, 16 or 8 |
Referenced by udd_ctrl_in_sent(), udd_ctrl_out_received(), and udd_ctrl_setup_received().
#define udd_get_endpoint_size | ( | ep | ) | (8<<USBB_EP_RD_BITFIELD(UECFG,EPSIZE,ep)) |
gets the configured selected endpoint size
#define udd_get_endpoint_type | ( | ep | ) | USBB_EP_RD_BITFIELD(UECFG,EPTYPE,ep) |
gets the configured selected endpoint type
#define udd_get_interrupt_endpoint_number | ( | ) |
returns the lowest endpoint number generating an endpoint interrupt or AVR32_USBB_EPT_NUM if none
#define udd_kill_last_in_bank | ( | ep | ) | USBB_EP_REG_SET(UECON,KILLBK,ep) |
kills last bank
#define udd_nb_busy_bank | ( | ep | ) | USBB_EP_RD_BITFIELD(UESTA,NBUSYBK,ep) |
returns the number of busy banks
#define udd_raise_crc_error | ( | ep | ) | USBB_EP_REG_SET(UESTA,STALLEDI,ep) |
raises CRC ERROR ISO OUT detected
#define udd_raise_endpoint_dma_interrupt | ( | ep | ) | (AVR32_USBB.udintset = AVR32_USBB_UDINTSET_DMA1INTS_MASK << ((ep) - 1)) |
#define udd_raise_in_send | ( | ep | ) | USBB_EP_REG_SET(UESTA,TXINI,ep) |
raises IN sending
#define udd_raise_nak_in | ( | ep | ) | USBB_EP_REG_SET(UESTA,NAKINI,ep) |
raises NAK IN received
#define udd_raise_nak_out | ( | ep | ) | USBB_EP_REG_SET(UESTA,NAKOUTI,ep) |
raises NAK OUT received
#define udd_raise_out_received | ( | ep | ) | USBB_EP_REG_SET(UESTA,RXOUTI,ep) |
raises OUT received
#define udd_raise_overflow_interrupt | ( | ep | ) | USBB_EP_REG_SET(UESTA,OVERFI,ep) |
raises endpoint isochronous overflow interrupt
#define udd_raise_setup_received | ( | ep | ) | USBB_EP_REG_SET(UESTA,RXSTPI,ep) |
raises SETUP received
#define udd_raise_short_packet | ( | ep | ) | USBB_EP_REG_SET(UESTA,SHORTPACKETI,ep) |
raises SHORT PACKET received
#define udd_raise_stall | ( | ep | ) | USBB_EP_REG_SET(UESTA,STALLEDI,ep) |
raises STALL sent
#define udd_raise_underflow_interrupt | ( | ep | ) | USBB_EP_REG_SET(UESTA,UNDERFI,ep) |
raises endpoint isochronous underflow interrupt
#define udd_reset_data_toggle | ( | ep | ) | USBB_EP_REG_SET(UECON,RSTDT,ep) |
resets the data toggle sequence
#define udd_reset_endpoint | ( | ep | ) |
resets the selected endpoint
#define udd_unallocate_memory | ( | ep | ) | USBB_EP_CLR_BITS(UECFG,ALLOC,ep) |
un-allocates the configuration selected endpoint in DPRAM memory
#define udd_unforce_bank_interrupt | ( | ep | ) | USBB_EP_REG_SET(UESTA,NBUSYBK,ep) |
unforces all banks full (OUT) or free (IN) interrupt
Generic macro for USBB registers that can be arrayed.
#define USBB_EP_CLR_BITS | ( | reg, | |
bit, | |||
ep | |||
) |
#define USBB_EP_RD_BITFIELD | ( | reg, | |
bit, | |||
ep | |||
) |
#define USBB_EP_REG_CLR | ( | reg, | |
bit, | |||
ep | |||
) |
#define USBB_EP_REG_SET | ( | reg, | |
bit, | |||
ep | |||
) |
#define USBB_EP_SET_BITS | ( | reg, | |
bit, | |||
ep | |||
) |
#define USBB_EP_TST_BITS | ( | reg, | |
bit, | |||
ep | |||
) |
#define USBB_EP_WR_BITFIELD | ( | reg, | |
bit, | |||
ep, | |||
value | |||
) |
#define USBB_UDDMA_ARRAY | ( | ep | ) | (((volatile avr32_usbb_uddmax_t *)&AVR32_USBB.uddma1_nextdesc)[(ep) - 1]) |
Structure for DMA registers.