Data Structures | |
struct | _AVR32_RxTdDescriptor |
struct | _AVR32_TxTdDescriptor |
struct | macb_packet_t |
Macros | |
#define | ADVERTISE_ALL |
#define | ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | ADVERTISE_CSMA) |
#define | AVR32_MACB_SPD_MASK 0x00000001 |
#define | AVR32_OWNERSHIP_BIT 0x00000001 |
Rx Ring descriptor flags | |
#define | AVR32_MACB_RX_USED_OFFSET 0 |
#define | AVR32_MACB_RX_USED_SIZE 1 |
#define | AVR32_MACB_RX_WRAP_OFFSET 1 |
#define | AVR32_MACB_RX_WRAP_SIZE 1 |
#define | AVR32_MACB_RX_LEN_OFFSET 0 |
#define | AVR32_MACB_RX_LEN_SIZE 12 |
#define | AVR32_MACB_RX_OFFSET_OFFSET 12 |
#define | AVR32_MACB_RX_OFFSET_SIZE 2 |
#define | AVR32_MACB_RX_SOF_OFFSET 14 |
#define | AVR32_MACB_RX_SOF_SIZE 1 |
#define | AVR32_MACB_RX_EOF_OFFSET 15 |
#define | AVR32_MACB_RX_EOF_SIZE 1 |
#define | AVR32_MACB_RX_CFI_OFFSET 16 |
#define | AVR32_MACB_RX_CFI_SIZE 1 |
Tx Ring descriptor flags | |
#define | AVR32_MACB_TX_LEN_OFFSET 0 |
#define | AVR32_MACB_TX_LEN_SIZE 11 |
#define | AVR32_MACB_TX_EOF_OFFSET 15 |
#define | AVR32_MACB_TX_EOF_SIZE 1 |
#define | AVR32_MACB_TX_NOCRC_OFFSET 16 |
#define | AVR32_MACB_TX_NOCRC_SIZE 1 |
#define | AVR32_MACB_TX_EMF_OFFSET 27 |
#define | AVR32_MACB_TX_EMF_SIZE 1 |
#define | AVR32_MACB_TX_UNR_OFFSET 28 |
#define | AVR32_MACB_TX_UNR_SIZE 1 |
#define | AVR32_MACB_TX_MAXRETRY_OFFSET 29 |
#define | AVR32_MACB_TX_MAXRETRY_SIZE 1 |
#define | AVR32_MACB_TX_WRAP_OFFSET 30 |
#define | AVR32_MACB_TX_WRAP_SIZE 1 |
#define | AVR32_MACB_TX_USED_OFFSET 31 |
#define | AVR32_MACB_TX_USED_SIZE 1 |
Generic MII registers. | |
#define | PHY_BMCR 0x00 |
Basic mode control register. More... | |
#define | PHY_BMSR 0x01 |
Basic mode status register. More... | |
#define | PHY_PHYSID1 0x02 |
PHYS ID 1. More... | |
#define | PHY_PHYSID2 0x03 |
PHYS ID 2. More... | |
#define | PHY_ADVERTISE 0x04 |
Advertisement control reg. More... | |
#define | PHY_LPA 0x05 |
Link partner ability reg. More... | |
Basic mode control register. | |
#define | BMCR_RESV 0x007f |
Unused... More... | |
#define | BMCR_CTST 0x0080 |
Collision test. More... | |
#define | BMCR_FULLDPLX 0x0100 |
Full duplex. More... | |
#define | BMCR_ANRESTART 0x0200 |
Auto negotiation restart. More... | |
#define | BMCR_ISOLATE 0x0400 |
Disconnect PHY from MII. More... | |
#define | BMCR_PDOWN 0x0800 |
Powerdown the PHY. More... | |
#define | BMCR_ANENABLE 0x1000 |
Enable auto negotiation. More... | |
#define | BMCR_SPEED100 0x2000 |
Select 100Mbps. More... | |
#define | BMCR_LOOPBACK 0x4000 |
TXD loopback bits. More... | |
#define | BMCR_RESET 0x8000 |
Reset the PHY. More... | |
Basic mode status register. | |
#define | BMSR_ERCAP 0x0001 |
Ext-reg capability. More... | |
#define | BMSR_JCD 0x0002 |
Jabber detected. More... | |
#define | BMSR_LSTATUS 0x0004 |
Link status. More... | |
#define | BMSR_ANEGCAPABLE 0x0008 |
Able to do auto-negotiation. More... | |
#define | BMSR_RFAULT 0x0010 |
Remote fault detected. More... | |
#define | BMSR_ANEGCOMPLETE 0x0020 |
Auto-negotiation complete. More... | |
#define | BMSR_RESV 0x00c0 |
Unused... More... | |
#define | BMSR_ESTATEN 0x0100 |
Extended Status in R15. More... | |
#define | BMSR_100FULL2 0x0200 |
Can do 100BASE-T2 HDX. More... | |
#define | BMSR_100HALF2 0x0400 |
Can do 100BASE-T2 FDX. More... | |
#define | BMSR_10HALF 0x0800 |
Can do 10mbps, half-duplex. More... | |
#define | BMSR_10FULL 0x1000 |
Can do 10mbps, full-duplex. More... | |
#define | BMSR_100HALF 0x2000 |
Can do 100mbps, half-duplex. More... | |
#define | BMSR_100FULL 0x4000 |
Can do 100mbps, full-duplex. More... | |
#define | BMSR_100BASE4 0x8000 |
Can do 100mbps, 4k packets. More... | |
Advertisement control register. | |
#define | ADVERTISE_SLCT 0x001f |
Selector bits. More... | |
#define | ADVERTISE_CSMA 0x0001 |
Only selector supported. More... | |
#define | ADVERTISE_10HALF 0x0020 |
Try for 10mbps half-duplex. More... | |
#define | ADVERTISE_1000XFULL 0x0020 |
Try for 1000BASE-X full-duplex. More... | |
#define | ADVERTISE_10FULL 0x0040 |
Try for 10mbps full-duplex. More... | |
#define | ADVERTISE_1000XHALF 0x0040 |
Try for 1000BASE-X half-duplex. More... | |
#define | ADVERTISE_100HALF 0x0080 |
Try for 100mbps half-duplex. More... | |
#define | ADVERTISE_1000XPAUSE 0x0080 |
Try for 1000BASE-X pause. More... | |
#define | ADVERTISE_100FULL 0x0100 |
Try for 100mbps full-duplex. More... | |
#define | ADVERTISE_1000XPSE_ASYM 0x0100 |
Try for 1000BASE-X asym pause. More... | |
#define | ADVERTISE_100BASE4 0x0200 |
Try for 100mbps 4k packets. More... | |
#define | ADVERTISE_PAUSE_CAP 0x0400 |
Try for pause. More... | |
#define | ADVERTISE_PAUSE_ASYM 0x0800 |
Try for asymmetric pause. More... | |
#define | ADVERTISE_RESV 0x1000 |
Unused... More... | |
#define | ADVERTISE_RFAULT 0x2000 |
Say we can detect faults. More... | |
#define | ADVERTISE_LPACK 0x4000 |
Ack link partners response. More... | |
#define | ADVERTISE_NPAGE 0x8000 |
Next page bit. More... | |
Link partner ability register. | |
#define | LPA_SLCT 0x001f |
Same as advertise selector. More... | |
#define | LPA_10HALF 0x0020 |
Can do 10mbps half-duplex. More... | |
#define | LPA_1000XFULL 0x0020 |
Can do 1000BASE-X full-duplex. More... | |
#define | LPA_10FULL 0x0040 |
Can do 10mbps full-duplex. More... | |
#define | LPA_1000XHALF 0x0040 |
Can do 1000BASE-X half-duplex. More... | |
#define | LPA_100HALF 0x0080 |
Can do 100mbps half-duplex. More... | |
#define | LPA_1000XPAUSE 0x0080 |
Can do 1000BASE-X pause. More... | |
#define | LPA_100FULL 0x0100 |
Can do 100mbps full-duplex. More... | |
#define | LPA_1000XPAUSE_ASYM 0x0100 |
Can do 1000BASE-X pause asym. More... | |
#define | LPA_100BASE4 0x0200 |
Can do 100mbps 4k packets. More... | |
#define | LPA_PAUSE_CAP 0x0400 |
Can pause. More... | |
#define | LPA_PAUSE_ASYM 0x0800 |
Can pause asymmetrically. More... | |
#define | LPA_RESV 0x1000 |
Unused... More... | |
#define | LPA_RFAULT 0x2000 |
Link partner faulted. More... | |
#define | LPA_LPACK 0x4000 |
Link partner acked us. More... | |
#define | LPA_NPAGE 0x8000 |
Next page bit. More... | |
#define | LPA_DUPLEX (LPA_10FULL | LPA_100FULL) |
#define | LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) |
#define | AVR32_BROADCAST_ADDR ((unsigned int) (1 << 31)) |
#define | AVR32_MULTICAST_HASH ((unsigned int) (1 << 30)) |
#define | AVR32_UNICAST_HASH ((unsigned int) (1 << 29)) |
#define | AVR32_EXTERNAL_ADDR ((unsigned int) (1 << 28)) |
#define | AVR32_SA1_ADDR ((unsigned int) (1 << 26)) |
#define | AVR32_SA2_ADDR ((unsigned int) (1 << 25)) |
#define | AVR32_SA3_ADDR ((unsigned int) (1 << 24)) |
#define | AVR32_SA4_ADDR ((unsigned int) (1 << 23)) |
#define | AVR32_TYPE_ID ((unsigned int) (1 << 22)) |
#define | AVR32_VLAN_TAG ((unsigned int) (1 << 21)) |
#define | AVR32_PRIORITY_TAG ((unsigned int) (1 << 20)) |
#define | AVR32_VLAN_PRIORITY ((unsigned int) (7 << 17)) |
#define | AVR32_CFI_IND ((unsigned int) (1 << 16)) |
#define | AVR32_EOF ((unsigned int) (1 << 15)) |
#define | AVR32_SOF ((unsigned int) (1 << 14)) |
#define | AVR32_RBF_OFFSET ((unsigned int) (3 << 12)) |
#define | AVR32_LENGTH_FRAME ((unsigned int) 0x0FFF) |
#define | AVR32_TRANSMIT_OK ((unsigned int) (1 << 31)) |
#define | AVR32_TRANSMIT_WRAP ((unsigned int) (1 << 30)) |
#define | AVR32_TRANSMIT_ERR ((unsigned int) (1 << 29)) |
#define | AVR32_TRANSMIT_UND ((unsigned int) (1 << 28)) |
#define | AVR32_BUF_EX ((unsigned int) (1 << 27)) |
#define | AVR32_TRANSMIT_NO_CRC ((unsigned int) (1 << 16)) |
#define | AVR32_LAST_BUFFER ((unsigned int) (1 << 15)) |
Typedefs | |
typedef struct _AVR32_RxTdDescriptor | AVR32_RxTdDescriptor |
typedef struct _AVR32_RxTdDescriptor * | AVR32P_RxTdDescriptor |
typedef struct _AVR32_TxTdDescriptor | AVR32_TxTdDescriptor |
typedef struct _AVR32_TxTdDescriptor * | AVR32P_TxTdDescriptor |
Functions | |
unsigned long | lMACBSend (volatile avr32_macb_t *macb, const void *pvFrom, unsigned long ulLength, long lEndOfFrame) |
Send ulLength bytes from pcFrom. More... | |
unsigned long | ulMACBInputLength (void) |
Function to get length of the next frame in the receive buffers. More... | |
unsigned long | ulReadMDIO (volatile avr32_macb_t *macb, unsigned short usAddress) |
void | vClearMACBTxBuffer (void) |
Called by the Tx interrupt, this function traverses the buffers used to hold the frame that has just completed transmission and marks each as free again. More... | |
void | vDisableMACBOperations (volatile avr32_macb_t *macb) |
Disable MACB operations (Tx and Rx). More... | |
void | vMACBRead (void *pvTo, unsigned long ulSectionLength, unsigned long ulTotalFrameLength) |
Frames can be read from the MACB in multiple sections. More... | |
void | vMACBSetMACAddress (const unsigned char *MACAddress) |
Set the MACB Physical address (SA1B & SA1T registers). More... | |
bool | vMACBWaitForInput (unsigned long ulTimeOut) |
Wait for new Ethernet data. More... | |
void | vWriteMDIO (volatile avr32_macb_t *macb, unsigned short usAddress, unsigned short usValue) |
bool | xMACBInit (volatile avr32_macb_t *macb) |
initialize the MACB driver. More... | |