scif_example2.c File Reference

#include "board.h"
#include "gpio.h"
#include "scif_uc3l.h"
#include "power_clocks_lib.h"

Macros
Generic Clock Configuration
#define	EXAMPLE_GCLK_ID   AVR32_SCIF_GCLK_DFLL0_SSG
#define	EXAMPLE_GCLK_PIN   AVR32_SCIF_GCLK_1_0_PIN
#define	EXAMPLE_GCLK_FUNCTION   AVR32_SCIF_GCLK_1_0_FUNCTION
#define	EXAMPLE_FDFLL_KHZ   24000
	The target output frequency (24MHz) of the DFLL. More...
#define	EXAMPLE_FDFLL_HZ   24000000UL
#define	EXAMPLE_GCLK_FREQ_HZ   12000000UL
	The target frequency (12MHz) of the generic clock. More...

Functions
static void	local_start_dfll_clock (void)
	Generate a high frequency clock with a DFLL running in closed-loop mode. More...
static void	local_start_gc (void)
	Set-up a generic clock at 12MHz with the DFLL as a source, output the generic clock to a pin. More...
int	main (void)

#define EXAMPLE_FDFLL_HZ   24000000UL

Referenced by local_start_dfll_clock(), and local_start_gc().

#define EXAMPLE_FDFLL_KHZ   24000

The target output frequency (24MHz) of the DFLL.

#define EXAMPLE_GCLK_FREQ_HZ   12000000UL

The target frequency (12MHz) of the generic clock.

Referenced by local_start_gc().

#define EXAMPLE_GCLK_FUNCTION   AVR32_SCIF_GCLK_1_0_FUNCTION

Referenced by local_start_gc().

#define EXAMPLE_GCLK_ID   AVR32_SCIF_GCLK_DFLL0_SSG

Referenced by local_start_gc().

#define EXAMPLE_GCLK_PIN   AVR32_SCIF_GCLK_1_0_PIN

Referenced by local_start_gc().

static void local_start_dfll_clock ( void  )

static

Generate a high frequency clock with a DFLL running in closed-loop mode.

References scif_gclk_opt_t::clock_source, scif_dfll_closedloop_conf_t::coarse, scif_dfll_closedloop_conf_t::coarsemaxstep, scif_gclk_opt_t::diven, EXAMPLE_FDFLL_HZ, scif_dfll_closedloop_conf_t::finemaxstep, scif_dfll_closedloop_conf_t::fmul, scif_dfll0_closedloop_mainref_gc_enable, scif_dfll0_closedloop_start(), SCIF_DFLL_MAXFREQ_HZ, SCIF_DFLL_MINFREQ_HZ, SCIF_GCCTRL_SLOWCLOCK, and SCIF_SLOWCLOCK_FREQ_HZ.

Referenced by main().

static void local_start_gc ( void  )

static

Set-up a generic clock at 12MHz with the DFLL as a source, output the generic clock to a pin.

References EXAMPLE_FDFLL_HZ, EXAMPLE_GCLK_FREQ_HZ, EXAMPLE_GCLK_FUNCTION, EXAMPLE_GCLK_ID, EXAMPLE_GCLK_PIN, gpio_enable_module_pin(), scif_gc_enable(), scif_gc_setup(), and SCIF_GCCTRL_DFLL0.

Referenced by main().

int main

(

void

)

References local_start_dfll_clock(), local_start_gc(), PM_CKSEL_DIVRATIO_2, PM_CLK_SRC_DFLL0, pm_set_clk_domain_div(), pm_set_mclk_source(), and SLEEP.