Generic Clock Management

Generic clocks are configurable clocks which run outside the system clock domain.

They are often connected to peripherals which have an asynchronous component running independently of the bus clock, e.g. USB controllers, low-power timers and RTCs, etc.

Note that not all platforms have support for generic clocks; on such platforms, this API will not be available.

Data Structures
struct	genclk_config
	Hardware representation of a set of generic clock parameters. More...

Enumerations
enum	genclk_source {   GENCLK_SRC_RCSYS = 0,   GENCLK_SRC_OSC32K = 1,   GENCLK_SRC_DFLL = 2,   GENCLK_SRC_OSC0 = 3,   GENCLK_SRC_RC80M = 4,   GENCLK_SRC_RCFAST = 5,   GENCLK_SRC_RC1M = 6,   GENCLK_SRC_CLK_CPU = 7,   GENCLK_SRC_CLK_HSB = 8,   GENCLK_SRC_CLK_PBA = 9,   GENCLK_SRC_CLK_PBB = 10,   GENCLK_SRC_CLK_PBC = 11,   GENCLK_SRC_CLK_PBD = 12,   GENCLK_SRC_RC32K = 13,   GENCLK_SRC_CLK_1K = 15,   GENCLK_SRC_PLL0 = 16,   GENCLK_SRC_HRPCLK = 17,   GENCLK_SRC_FPCLK = 18,   GENCLK_SRC_GCLKIN0 = 19,   GENCLK_SRC_GCLKIN1 = 20,   GENCLK_SRC_GCLK11 = 21 }
	Generic clock source ID. More...

Functions
static void	genclk_config_defaults (struct genclk_config *cfg, uint32_t id)
static void	genclk_config_read (struct genclk_config *cfg, uint32_t id)
static void	genclk_config_set_divider (struct genclk_config *cfg, uint32_t divider)
static void	genclk_config_write (const struct genclk_config *cfg, uint32_t id)
static void	genclk_disable (uint32_t id)
static void	genclk_enable (const struct genclk_config *cfg, uint32_t id)
static void	genclk_enable_config (unsigned int id, enum genclk_source src, unsigned int divider)
	Enable the configuration defined by src and divider for the generic clock identified by id. More...

Generic clock configuration
static void	genclk_config_set_source (struct genclk_config *cfg, enum genclk_source src)
	Select a new source clock src in configuration cfg. More...
static void	genclk_enable_source (enum genclk_source src)
	Enable the source clock src used by a generic clock. More...

Chip-specific generic clock definitions
#define	GENCLK_DIV_MAX   256
	Maximum divider supported by the generic clock implementation. More...

#define GENCLK_DIV_MAX   256

Maximum divider supported by the generic clock implementation.

Referenced by genclk_config_set_divider().

enum genclk_source

Generic clock source ID.

Each generic clock may be generated from a different clock source. These are the available alternatives provided by the chip.

Enumerator
GENCLK_SRC_RCSYS	System RC oscillator.
GENCLK_SRC_OSC32K	32 kHz oscillator
GENCLK_SRC_DFLL	DFLL.
GENCLK_SRC_OSC0	Oscillator 0.
GENCLK_SRC_RC80M	80 MHz RC oscillator
GENCLK_SRC_RCFAST	4-8-12 MHz RC oscillator
GENCLK_SRC_RC1M	1 MHz RC oscillator
GENCLK_SRC_CLK_CPU	CPU clock.
GENCLK_SRC_CLK_HSB	High Speed Bus clock.
GENCLK_SRC_CLK_PBA	Peripheral Bus A clock.
GENCLK_SRC_CLK_PBB	Peripheral Bus B clock.
GENCLK_SRC_CLK_PBC	Peripheral Bus C clock.
GENCLK_SRC_CLK_PBD	Peripheral Bus D clock.
GENCLK_SRC_RC32K	32 kHz RC oscillator
GENCLK_SRC_CLK_1K	1 kHz output from OSC32K
GENCLK_SRC_PLL0	PLL0.
GENCLK_SRC_HRPCLK	High resolution prescaler.
GENCLK_SRC_FPCLK	Fractional prescaler.
GENCLK_SRC_GCLKIN0	GCLKIN0.
GENCLK_SRC_GCLKIN1	GCLKIN1.
GENCLK_SRC_GCLK11	GCLK11.

static void genclk_config_defaults ( struct genclk_config *  cfg, uint32_t  id  )

inlinestatic

References genclk_config::ctrl, and UNUSED.

Referenced by dfll_config_init_open_loop_mode(), genclk_enable_config(), and run_generic_clock_test().

static void genclk_config_read ( struct genclk_config *  cfg, uint32_t  id  )

inlinestatic

References genclk_config::ctrl.

static void genclk_config_set_divider ( struct genclk_config *  cfg, uint32_t  divider  )

inlinestatic

References Assert, genclk_config::ctrl, and GENCLK_DIV_MAX.

Referenced by genclk_enable_config(), and run_generic_clock_test().

void genclk_config_set_source ( struct genclk_config *  cfg, enum genclk_source  src  )

inlinestatic

Select a new source clock src in configuration cfg.

References genclk_config::ctrl.

Referenced by genclk_enable_config(), and run_generic_clock_test().

static void genclk_config_write ( const struct genclk_config *  cfg, uint32_t  id  )

inlinestatic

References genclk_config::ctrl.

static void genclk_disable ( uint32_t  id )

inlinestatic

Referenced by cleanup_generic_clock_test(), dfll_disable_closed_loop(), dfll_disable_open_loop(), and sysclk_disable_usb().

static void genclk_enable ( const struct genclk_config *  cfg, uint32_t  id  )

inlinestatic

References genclk_config::ctrl.

Referenced by dfll_enable_closed_loop(), genclk_enable_config(), and run_generic_clock_test().

static void genclk_enable_config ( unsigned int  id, enum genclk_source  src, unsigned int  divider  )

inlinestatic

Enable the configuration defined by src and divider for the generic clock identified by id.

Parameters

id	The ID of the generic clock.
src	The source clock of the generic clock.
divider	The divider used to generate the generic clock.

References genclk_config_defaults(), genclk_config_set_divider(), genclk_config_set_source(), genclk_enable(), and genclk_enable_source().

Referenced by sysclk_enable_usb().

void genclk_enable_source ( enum genclk_source  src )

inlinestatic

Enable the source clock src used by a generic clock.

References Assert, dfll_enable_config_defaults(), GENCLK_SRC_CLK_1K, GENCLK_SRC_CLK_CPU, GENCLK_SRC_CLK_HSB, GENCLK_SRC_CLK_PBA, GENCLK_SRC_CLK_PBB, GENCLK_SRC_CLK_PBC, GENCLK_SRC_CLK_PBD, GENCLK_SRC_DFLL, GENCLK_SRC_OSC0, GENCLK_SRC_OSC32K, GENCLK_SRC_PLL0, GENCLK_SRC_RC1M, GENCLK_SRC_RC32K, GENCLK_SRC_RC80M, GENCLK_SRC_RCFAST, GENCLK_SRC_RCSYS, osc_enable(), OSC_ID_OSC0, OSC_ID_OSC32, OSC_ID_RC1M, OSC_ID_RC32K, OSC_ID_RC80M, OSC_ID_RCFAST, osc_is_ready(), osc_wait_ready(), and pll_enable_config_defaults().

Referenced by genclk_enable_config().