The Power Manager (PM) provides synchronous clocks to the CPU and the modules and peripherals connected to the HSB and PBx buses.
The PM also contains advanced power-saving features and a Reset Controller.
Modules | |
Power Clocks Library | |
Macros | |
#define | PM_NOT_SUPPORTED (-10000) |
Define "not supported" for the power manager features. More... | |
#define | PM_POLL_TIMEOUT 100000 |
The timeguard used for polling (expressed in ticks). More... | |
#define | PM_UNLOCK(reg) (AVR32_PM.unlock = (unsigned long)(AVR32_PM_UNLOCK_KEY_VALUE << AVR32_PM_UNLOCK_KEY_OFFSET)|(reg)) |
Unlock PM register macro. More... | |
Enumerations | |
enum | pm_clk_domain_t { PM_CLK_DOMAIN_0 = AVR32_PM_CLK_GRP_CPU, PM_CLK_DOMAIN_1 = AVR32_PM_CLK_GRP_HSB, PM_CLK_DOMAIN_2 = AVR32_PM_CLK_GRP_PBA, PM_CLK_DOMAIN_3 = AVR32_PM_CLK_GRP_PBB, PM_CLK_DOMAIN_4 = AVR32_PM_CLK_GRP_PBC, PM_CLK_DOMAIN_INVALID } |
The clock domains of the power manager. More... | |
enum | pm_clk_src_t { PM_CLK_SRC_SLOW = AVR32_PM_MCSEL_SLOW, PM_CLK_SRC_OSC0 = AVR32_PM_MCSEL_OSC0, PM_CLK_SRC_OSC1 = AVR32_PM_MCSEL_OSC1, PM_CLK_SRC_PLL0 = AVR32_PM_MCSEL_PLL0, PM_CLK_SRC_PLL1 = AVR32_PM_MCSEL_PLL1, PM_CLK_SRC_RC8M = AVR32_PM_MCSEL_RCOSC8, PM_CLK_SRC_RCRIPOSC = AVR32_PM_MCSEL_CRIPOSC, PM_CLK_SRC_RC120M = AVR32_PM_MCSEL_RC120M, PM_CLK_SRC_INVALID } |
Device-specific data. More... | |
enum | pm_divratio_t { PM_CKSEL_DIVRATIO_2 = 0, PM_CKSEL_DIVRATIO_4, PM_CKSEL_DIVRATIO_8, PM_CKSEL_DIVRATIO_16, PM_CKSEL_DIVRATIO_32, PM_CKSEL_DIVRATIO_64, PM_CKSEL_DIVRATIO_128, PM_CKSEL_DIVRATIO_256 } |
The possible synchronous clock division ratio. More... | |
Clock Functions | |
long | pm_set_mclk_source (pm_clk_src_t src) |
Set the main clock. More... | |
long | pm_config_mainclk_safety (bool cfd, bool final) |
Configure the main clock safety mechanisms. More... | |
long | pm_set_clk_domain_div (pm_clk_domain_t clock_domain, pm_divratio_t divratio) |
Set the division ratio for a clock domain. More... | |
long | pm_disable_clk_domain_div (pm_clk_domain_t clock_domain) |
Disable the division ratio for a clock domain. More... | |
long | pm_wait_for_clk_ready (void) |
Wait actively for the clock settings to be effective. More... | |
Module Functions | |
long | pm_enable_module (unsigned long module) |
Enable the clock of a module. More... | |
long | pm_disable_module (unsigned long module) |
Disable the clock of a module. More... | |
Sleep Functions | |
static __always_inline unsigned long | pm_get_wake_cause (void) |
Returns MCU wake cause. More... | |
static __always_inline void | pm_asyn_wake_up_enable (unsigned long awen_mask) |
Enable one or several asynchronous wake-up source. More... | |
static __always_inline void | pm_asyn_wake_up_disable (unsigned long awen_mask) |
Disable one or several asynchronous wake-up sources. More... | |
#define | SLEEP(sleep_mode) {__asm__ __volatile__ ("sleep "STRINGZ(sleep_mode));} |
Sets the MCU in the specified sleep mode. More... | |
Reset Functions | |
static __always_inline unsigned long | pm_get_reset_cause (void) |
Returns MCU last reset cause. More... | |
Interrupt Functions | |
static __always_inline void | pm_enable_interrupts (unsigned long mask) |
Enable power manager interrupts. More... | |
static __always_inline void | pm_disable_interrupts (unsigned long mask) |
Disable power manager interrupts. More... | |
static __always_inline unsigned long | pm_get_enabled_interrupts (void) |
Read the enabled power manager interrupts. More... | |
static __always_inline unsigned long | pm_get_interrupts_status (void) |
Read the interrupts status of the power manager. More... | |
static __always_inline void | pm_clear_interrupt_status (unsigned long mask) |
Clear raised interrupts from the power manager. More... | |
Misc Functions | |
static __always_inline unsigned long | pm_get_status (void) |
Get the PM status. More... | |
#define PM_NOT_SUPPORTED (-10000) |
Define "not supported" for the power manager features.
#define PM_POLL_TIMEOUT 100000 |
The timeguard used for polling (expressed in ticks).
Referenced by pm_wait_for_clk_ready().
#define PM_UNLOCK | ( | reg | ) | (AVR32_PM.unlock = (unsigned long)(AVR32_PM_UNLOCK_KEY_VALUE << AVR32_PM_UNLOCK_KEY_OFFSET)|(reg)) |
Unlock PM register macro.
Referenced by pm_config_mainclk_safety(), pm_disable_clk_domain_div(), pm_disable_module(), pm_enable_module(), pm_set_clk_domain_div(), and pm_set_mclk_source().
#define SLEEP | ( | sleep_mode | ) | {__asm__ __volatile__ ("sleep "STRINGZ(sleep_mode));} |
Sets the MCU in the specified sleep mode.
sleep_mode | The sleep mode index |
Referenced by pm_sleep().
enum pm_clk_domain_t |
enum pm_clk_src_t |
enum pm_divratio_t |
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static |
Disable one or several asynchronous wake-up sources.
awen_mask | Mask of asynchronous wake-up sources (use one of the defines AVR32_PM_AWEN_xxxxWEN_MASK in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/) |
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static |
Enable one or several asynchronous wake-up source.
awen_mask | Mask of asynchronous wake-up sources (use one of the defines AVR32_PM_AWEN_xxxxWEN_MASK in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/) |
Referenced by udd_enable().
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static |
Clear raised interrupts from the power manager.
mask | The interrupts to clear. |
Configure the main clock safety mechanisms.
cfd | Enable/disable the Clock Failure Detection mechanism |
final | If true, make this configuration definitive |
=0 | Success. |
<0 | An error occurred. |
References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, u_avr32_pm_cfdctrl_t::cfdctrl, u_avr32_pm_cfdctrl_t::CFDCTRL, PASS, and PM_UNLOCK.
long pm_disable_clk_domain_div | ( | pm_clk_domain_t | clock_domain | ) |
Disable the division ratio for a clock domain.
clock_domain | The clock domain to alter. |
=0 | Success. |
<0 | An error occurred. |
References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, u_avr32_pm_cpusel_t::cpusel, u_avr32_pm_cpusel_t::CPUSEL, DISABLE, PASS, and PM_UNLOCK.
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Disable power manager interrupts.
mask | the interrupts to disable. |
long pm_disable_module | ( | unsigned long | module | ) |
Disable the clock of a module.
module | The module to shut down (use one of the defines in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") |
0 | Success. |
<0 | An error occurred. |
References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, PASS, and PM_UNLOCK.
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static |
Enable power manager interrupts.
mask | the interrupts to enable. |
long pm_enable_module | ( | unsigned long | module | ) |
Enable the clock of a module.
module | The module to clock (use one of the defines in the part-specific header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks") |
0 | Success. |
<0 | An error occurred. |
Enable the clock of a module.
References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, PASS, and PM_UNLOCK.
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Read the enabled power manager interrupts.
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Read the interrupts status of the power manager.
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Returns MCU last reset cause.
AVR32_PM_RCAUSE_x_MASK
bit-masks to isolate specific causes.
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Get the PM status.
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Returns MCU wake cause.
AVR32_PM_WCAUSE_x_MASK
bit-masks to isolate specific causes. long pm_set_clk_domain_div | ( | pm_clk_domain_t | clock_domain, |
pm_divratio_t | divratio | ||
) |
Set the division ratio for a clock domain.
clock_domain | The clock domain to alter. |
divratio | The division ratio to set. |
=0 | Success. |
<0 | An error occurred. |
References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, u_avr32_pm_cpusel_t::cpusel, u_avr32_pm_cpusel_t::CPUSEL, PASS, and PM_UNLOCK.
long pm_set_mclk_source | ( | pm_clk_src_t | src | ) |
Set the main clock.
src | The clock to use as the main clock. |
0 | Success. |
<0 | An error occurred when trying to set the main clock. |
Set the main clock.
References AVR32_ENTER_CRITICAL_REGION, AVR32_LEAVE_CRITICAL_REGION, PASS, and PM_UNLOCK.
Referenced by pcl_configure_synchronous_clocks(), and pcl_switch_to_osc().
long pm_wait_for_clk_ready | ( | void | ) |
Wait actively for the clock settings to be effective.
0 | Success. |
<0 | Unable to reach a clock ready status within the polling limit. |
References PASS, and PM_POLL_TIMEOUT.