The Enhanced Embedded Flash Controller ensures the interface of the Flash block with the 32-bit internal bus.
Macros | |
#define | EEFC_ERROR_FLAGS (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE | EEFC_FSR_FLERR) |
#define | EEFC_FCR_FCMD(value) ((EEFC_FCR_FCMD_Msk & ((value) << EEFC_FCR_FCMD_Pos))) |
#define | EEFC_FCR_FKEY_PASSWD EEFC_FCR_FKEY(FWP_KEY) |
#define | FWP_KEY 0x5Au |
#define | READ_BUFF_ADDR0 IFLASH0_ADDR |
#define | READ_BUFF_ADDR1 IFLASH1_ADDR |
Functions | |
void | efc_disable_cloe (Efc *p_efc) |
Disable code loop optimization. More... | |
void | efc_disable_frdy_interrupt (Efc *p_efc) |
Disable the flash ready interrupt. More... | |
void | efc_disable_write_protection (Efc *p_efc) |
Disable the write protection. More... | |
void | efc_enable_cloe (Efc *p_efc) |
Enable code loop optimization. More... | |
void | efc_enable_frdy_interrupt (Efc *p_efc) |
Enable the flash ready interrupt. More... | |
void | efc_enable_write_protection (Efc *p_efc) |
Enable the write protection. More... | |
uint32_t | efc_get_result (Efc *p_efc) |
Get the result of the last executed command. More... | |
uint32_t | efc_get_status (Efc *p_efc) |
Get the current status of the EEFC. More... | |
uint32_t | efc_get_wait_state (Efc *p_efc) |
Get flash wait state. More... | |
uint32_t | efc_init (Efc *p_efc, uint32_t ul_access_mode, uint32_t ul_fws) |
Initialize the EFC controller. More... | |
uint32_t | efc_perform_command (Efc *p_efc, uint32_t ul_command, uint32_t ul_argument) |
Perform the given command and wait until its completion (or an error). More... | |
uint32_t | efc_perform_fcr (Efc *p_efc, uint32_t ul_fcr) |
Perform command. More... | |
__no_inline RAMFUNC uint32_t | efc_perform_read_sequence (Efc *p_efc, uint32_t ul_cmd_st, uint32_t ul_cmd_sp, uint32_t *p_ul_buf, uint32_t ul_size) |
Perform read sequence. More... | |
void | efc_set_wait_state (Efc *p_efc, uint32_t ul_fws) |
Set flash wait state. More... | |
void | efc_write_fmr (Efc *p_efc, uint32_t ul_fmr) |
Set mode register. More... | |
#define EEFC_ERROR_FLAGS (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE | EEFC_FSR_FLERR) |
Referenced by efc_perform_fcr().
#define EEFC_FCR_FCMD | ( | value | ) | ((EEFC_FCR_FCMD_Msk & ((value) << EEFC_FCR_FCMD_Pos))) |
Referenced by efc_perform_command(), and efc_perform_read_sequence().
#define EEFC_FCR_FKEY_PASSWD EEFC_FCR_FKEY(FWP_KEY) |
Referenced by efc_perform_command(), and efc_perform_read_sequence().
#define FWP_KEY 0x5Au |
Referenced by efc_perform_read_sequence().
#define READ_BUFF_ADDR0 IFLASH0_ADDR |
Referenced by efc_perform_read_sequence().
#define READ_BUFF_ADDR1 IFLASH1_ADDR |
Referenced by efc_perform_read_sequence().
void efc_disable_cloe | ( | Efc * | p_efc | ) |
Disable code loop optimization.
p_efc | Pointer to an EFC instance. |
References efc_write_fmr().
void efc_disable_frdy_interrupt | ( | Efc * | p_efc | ) |
Disable the flash ready interrupt.
p_efc | Pointer to an EFC instance. |
References efc_write_fmr().
void efc_disable_write_protection | ( | Efc * | p_efc | ) |
Disable the write protection.
p_efc | Pointer to an EFC instance. |
void efc_enable_cloe | ( | Efc * | p_efc | ) |
Enable code loop optimization.
p_efc | Pointer to an EFC instance. |
References efc_write_fmr().
void efc_enable_frdy_interrupt | ( | Efc * | p_efc | ) |
Enable the flash ready interrupt.
p_efc | Pointer to an EFC instance. |
References efc_write_fmr().
void efc_enable_write_protection | ( | Efc * | p_efc | ) |
Enable the write protection.
p_efc | Pointer to an EFC instance. |
uint32_t efc_get_result | ( | Efc * | p_efc | ) |
Get the result of the last executed command.
p_efc | Pointer to an EFC instance. |
uint32_t efc_get_status | ( | Efc * | p_efc | ) |
Get the current status of the EEFC.
p_efc | Pointer to an EFC instance. |
uint32_t efc_get_wait_state | ( | Efc * | p_efc | ) |
Get flash wait state.
p_efc | Pointer to an EFC instance. |
uint32_t efc_init | ( | Efc * | p_efc, |
uint32_t | ul_access_mode, | ||
uint32_t | ul_fws | ||
) |
Initialize the EFC controller.
ul_access_mode | 0 for 128-bit, EEFC_FMR_FAM for 64-bit. |
ul_fws | The number of wait states in cycle (no shift). |
References EFC_RC_OK, and efc_write_fmr().
uint32_t efc_perform_command | ( | Efc * | p_efc, |
uint32_t | ul_command, | ||
uint32_t | ul_argument | ||
) |
Perform the given command and wait until its completion (or an error).
p_efc | Pointer to an EFC instance. |
ul_command | Command to perform. |
ul_argument | Optional command argument. |
References cpu_irq_restore(), cpu_irq_save(), EEFC_FCR_FCMD, EEFC_FCR_FKEY_PASSWD, EFC_FCMD_SPUI, EFC_FCMD_STUI, efc_perform_fcr(), and EFC_RC_NOT_SUPPORT.
__no_inline RAMFUNC uint32_t efc_perform_fcr | ( | Efc * | p_efc, |
uint32_t | ul_fcr | ||
) |
Perform command.
p_efc | Pointer to an EFC instance. |
ul_fcr | Flash command. |
References EEFC_ERROR_FLAGS.
Referenced by efc_perform_command().
__no_inline RAMFUNC uint32_t efc_perform_read_sequence | ( | Efc * | p_efc, |
uint32_t | ul_cmd_st, | ||
uint32_t | ul_cmd_sp, | ||
uint32_t * | p_ul_buf, | ||
uint32_t | ul_size | ||
) |
Perform read sequence.
Supported sequences are read Unique ID and read User Signature
p_efc | Pointer to an EFC instance. |
ul_cmd_st | Start command to perform. |
ul_cmd_sp | Stop command to perform. |
p_ul_buf | Pointer to an data buffer. |
ul_size | Buffer size. |
References EEFC_FCR_FCMD, EEFC_FCR_FKEY_PASSWD, EFC_RC_INVALID, EFC_RC_NOT_SUPPORT, EFC_RC_OK, FWP_KEY, READ_BUFF_ADDR0, and READ_BUFF_ADDR1.
void efc_set_wait_state | ( | Efc * | p_efc, |
uint32_t | ul_fws | ||
) |
Set flash wait state.
p_efc | Pointer to an EFC instance. |
ul_fws | The number of wait states in cycle (no shift). |
References efc_write_fmr().
__no_inline RAMFUNC void efc_write_fmr | ( | Efc * | p_efc, |
uint32_t | ul_fmr | ||
) |
Set mode register.
p_efc | Pointer to an EFC instance. |
ul_fmr | Value of mode register |
Referenced by efc_disable_cloe(), efc_disable_frdy_interrupt(), efc_enable_cloe(), efc_enable_frdy_interrupt(), efc_init(), and efc_set_wait_state().