ethernet_phy.h File Reference

KSZ8081RNA (Ethernet PHY) driver for SAM.

Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.

#include "compiler.h"

Macros
#define	GMII_100BASE_T4   (1 << 15)
#define	GMII_100BASE_TX_FD   (1 << 14)
#define	GMII_100BASE_TX_HD   (1 << 13)
#define	GMII_100T4   (1 << 9)
#define	GMII_100TX_FDX   (1 << 8)
#define	GMII_100TX_HDX   (1 << 7)
#define	GMII_10_FDX   (1 << 6)
#define	GMII_10_HDX   (1 << 5)
#define	GMII_10BASE_T_FD   (1 << 12)
#define	GMII_10BASE_T_HD   (1 << 11)
#define	GMII_AFECR1   0x11
#define	GMII_AN_IEEE_802_3   0x0001
#define	GMII_ANAR   0x04
#define	GMII_ANER   0x06
#define	GMII_ANLPAR   0x05
#define	GMII_ANLPNPAR   0x08
#define	GMII_ANNPR   0x07
#define	GMII_AUTONEG   (1 << 12)
#define	GMII_AUTONEG_ABILITY   (1 << 3)
#define	GMII_AUTONEG_COMP   (1 << 5)
#define	GMII_BMCR   0x00
#define	GMII_BMSR   0x01
#define	GMII_COLLISION_TEST   (1 << 7)
#define	GMII_DRCR   0x10
#define	GMII_DUPLEX_MODE   (1 << 8)
#define	GMII_ECR   0x18
#define	GMII_EXTEND_CAPAB   (1 << 0)
#define	GMII_ICSR   0x1B
#define	GMII_ISOLATE   (1 << 10)
#define	GMII_JABBER_DETECT   (1 << 1)
#define	GMII_LCSR   0x1D
#define	GMII_LINK_STATUS   (1 << 2)
#define	GMII_LOOPBACK   (1 << 14)
#define	GMII_LP_AN_ABLE   (1 << 0)
#define	GMII_LP_NP_ABLE   (1 << 3)
#define	GMII_LSB_MASK   0x3F
#define	GMII_MF_PREAMB_SUPPR   (1 << 6)
#define	GMII_NP   (1 << 15)
#define	GMII_NP_ABLE   (1 << 2)
#define	GMII_OMI_100BASE_TX_FD   0x0006
#define	GMII_OMI_100BASE_TX_HD   0x0002
#define	GMII_OMI_10BASE_T_FD   0x0005
#define	GMII_OMI_10BASE_T_HD   0x0001
#define	GMII_OMSOR   0x16
#define	GMII_OMSSR   0x17
#define	GMII_OUI_LSB   0x1572
#define	GMII_OUI_MSB   0x0022
#define	GMII_PAGE_RX   (1 << 1)
#define	GMII_PAUSE_MASK   (3 << 10)
#define	GMII_PCR1   0x1E
#define	GMII_PCR2   0x1F
#define	GMII_PDF   (1 << 4)
#define	GMII_PHYID1   0x02
#define	GMII_PHYID2   0x03
#define	GMII_POWER_DOWN   (1 << 11)
#define	GMII_REMOTE_FAULT   (1 << 4)
#define	GMII_RESET   (1 << 15)
#define	GMII_RESTART_AUTONEG   (1 << 9)
#define	GMII_RF   (1 << 13)
#define	GMII_RXERCR   0x15
#define	GMII_SPEED_SELECT   (1 << 13)

Functions
uint8_t	ethernet_phy_auto_negotiate (Gmac *p_gmac, uint8_t uc_phy_addr)
	Issue an auto negotiation of the PHY. More...
uint8_t	ethernet_phy_init (Gmac *p_gmac, uint8_t uc_phy_addr, uint32_t ul_mck)
	Perform a HW initialization to the PHY and set up clocks. More...
uint8_t	ethernet_phy_reset (Gmac *p_gmac, uint8_t uc_phy_addr)
	Issue a SW reset to reset all registers of the PHY. More...
uint8_t	ethernet_phy_set_link (Gmac *p_gmac, uint8_t uc_phy_addr, uint8_t uc_apply_setting_flag)
	Get the Link & speed settings, and automatically set up the GMAC with the settings. More...

#define GMII_100BASE_T4   (1 << 15)

#define GMII_100BASE_TX_FD   (1 << 14)

Referenced by ethernet_phy_set_link().

#define GMII_100BASE_TX_HD   (1 << 13)

Referenced by ethernet_phy_set_link().

#define GMII_100T4   (1 << 9)

#define GMII_100TX_FDX   (1 << 8)

Referenced by ethernet_phy_auto_negotiate().

#define GMII_100TX_HDX   (1 << 7)

Referenced by ethernet_phy_auto_negotiate().

#define GMII_10_FDX   (1 << 6)

Referenced by ethernet_phy_auto_negotiate().

#define GMII_10_HDX   (1 << 5)

Referenced by ethernet_phy_auto_negotiate().

#define GMII_10BASE_T_FD   (1 << 12)

Referenced by ethernet_phy_set_link().

#define GMII_10BASE_T_HD   (1 << 11)

Referenced by ethernet_phy_set_link().

#define GMII_AFECR1   0x11

#define GMII_AN_IEEE_802_3   0x0001

Referenced by ethernet_phy_auto_negotiate().

#define GMII_ANAR   0x04

Referenced by ethernet_phy_auto_negotiate().

#define GMII_ANER   0x06

#define GMII_ANLPAR   0x05

Referenced by ethernet_phy_auto_negotiate().

#define GMII_ANLPNPAR   0x08

#define GMII_ANNPR   0x07

#define GMII_AUTONEG   (1 << 12)

Referenced by ethernet_phy_auto_negotiate().

#define GMII_AUTONEG_ABILITY   (1 << 3)

#define GMII_AUTONEG_COMP   (1 << 5)

Referenced by ethernet_phy_auto_negotiate().

#define GMII_BMCR   0x00

Referenced by ethernet_phy_auto_negotiate(), and ethernet_phy_reset().

#define GMII_BMSR   0x01

Referenced by ethernet_phy_auto_negotiate(), ethernet_phy_find_valid(), and ethernet_phy_set_link().

#define GMII_COLLISION_TEST   (1 << 7)

#define GMII_DRCR   0x10

#define GMII_DUPLEX_MODE   (1 << 8)

Referenced by ethernet_phy_auto_negotiate().

#define GMII_ECR   0x18

#define GMII_EXTEND_CAPAB   (1 << 0)

#define GMII_ICSR   0x1B

#define GMII_ISOLATE   (1 << 10)

Referenced by ethernet_phy_auto_negotiate().

#define GMII_JABBER_DETECT   (1 << 1)

#define GMII_LCSR   0x1D

#define GMII_LINK_STATUS   (1 << 2)

Referenced by ethernet_phy_set_link().

#define GMII_LOOPBACK   (1 << 14)

Referenced by ethernet_phy_auto_negotiate().

#define GMII_LP_AN_ABLE   (1 << 0)

#define GMII_LP_NP_ABLE   (1 << 3)

#define GMII_LSB_MASK   0x3F

#define GMII_MF_PREAMB_SUPPR   (1 << 6)

#define GMII_NP   (1 << 15)

#define GMII_NP_ABLE   (1 << 2)

#define GMII_OMI_100BASE_TX_FD   0x0006

Referenced by ethernet_phy_set_link().

#define GMII_OMI_100BASE_TX_HD   0x0002

Referenced by ethernet_phy_set_link().

#define GMII_OMI_10BASE_T_FD   0x0005

Referenced by ethernet_phy_set_link().

#define GMII_OMI_10BASE_T_HD   0x0001

Referenced by ethernet_phy_set_link().

#define GMII_OMSOR   0x16

#define GMII_OMSSR   0x17

#define GMII_OUI_LSB   0x1572

#define GMII_OUI_MSB   0x0022

Referenced by ethernet_phy_find_valid().

#define GMII_PAGE_RX   (1 << 1)

#define GMII_PAUSE_MASK   (3 << 10)

#define GMII_PCR1   0x1E

Referenced by ethernet_phy_set_link().

#define GMII_PCR2   0x1F

#define GMII_PDF   (1 << 4)

#define GMII_PHYID1   0x02

Referenced by ethernet_phy_find_valid().

#define GMII_PHYID2   0x03

#define GMII_POWER_DOWN   (1 << 11)

Referenced by ethernet_phy_auto_negotiate().

#define GMII_REMOTE_FAULT   (1 << 4)

#define GMII_RESET   (1 << 15)

Referenced by ethernet_phy_reset().

#define GMII_RESTART_AUTONEG   (1 << 9)

Referenced by ethernet_phy_auto_negotiate().

#define GMII_RF   (1 << 13)

#define GMII_RXERCR   0x15

#define GMII_SPEED_SELECT   (1 << 13)

Referenced by ethernet_phy_auto_negotiate().