Clock configuration.
Copyright (c) 2011-2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
#define | CONFIG_PLL0_DIV 1 |
#define | CONFIG_PLL0_MUL 14 |
#define | CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL |
#define | CONFIG_SYSCLK_PRES SYSCLK_PRES_2 |
#define | CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK |
#define CONFIG_PLL0_DIV 1 |
Referenced by pll_enable_config_defaults().
#define CONFIG_PLL0_MUL 14 |
Referenced by pll_enable_config_defaults().
#define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL |
Referenced by pll_enable_config_defaults(), sysclk_enable_usb(), and sysclk_init().
#define CONFIG_SYSCLK_PRES SYSCLK_PRES_2 |
Referenced by sysclk_init().
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK |
Referenced by sysclk_init().