Unit tests for SPI driver.
Copyright (c) 2011-2018 Microchip Technology Inc. and its subsidiaries.
#include <stdint.h>#include <stdbool.h>#include <board.h>#include <sysclk.h>#include <spi.h>#include <string.h>#include <unit_test/suite.h>#include <stdio_serial.h>#include <conf_test.h>#include <conf_board.h>Data Structures | |
| struct | at25_command |
| AT25 command struct. More... | |
| struct | spi_command |
| SPI command to send. More... | |
Macros | |
| #define | AT25_BLOCK_ERASE_32K 0x52 |
| Block erase command code (32K block). More... | |
| #define | AT25_BLOCK_ERASE_4K 0x20 |
| Block erase command code (4K block). More... | |
| #define | AT25_BLOCK_ERASE_64K 0xD8 |
| Block erase command code (64K block). More... | |
| #define | AT25_BYTE_PAGE_PROGRAM 0x02 |
| Byte/page program command code. More... | |
| #define | AT25_CHIP_ERASE_1 0x60 |
| Chip erase command code 1. More... | |
| #define | AT25_CHIP_ERASE_2 0xC7 |
| Chip erase command code 2. More... | |
| #define | AT25_DEEP_PDOWN 0xB9 |
| Deep power-down command code. More... | |
| #define | AT25_PROTECT_SECTOR 0x36 |
| Protect sector command code. More... | |
| #define | AT25_READ_ARRAY 0x0B |
| Read array command code. More... | |
| #define | AT25_READ_ARRAY_LF 0x03 |
| Read array (low frequency) command code. More... | |
| #define | AT25_READ_JEDEC_ID 0x9F |
| Read manufacturer and device ID command code. More... | |
| #define | AT25_READ_SECTOR_PROT 0x3C |
| Read sector protection registers command code. More... | |
| #define | AT25_READ_STATUS 0x05 |
| Read status register command code. More... | |
| #define | AT25_RES_DEEP_PDOWN 0xAB |
| Resume from deep power-down command code. More... | |
| #define | AT25_SEQUENTIAL_PROGRAM_1 0xAD |
| Sequential program mode command code 1. More... | |
| #define | AT25_SEQUENTIAL_PROGRAM_2 0xAF |
| Sequential program mode command code 2. More... | |
| #define | AT25_STATUS_EPE (1 << 5) |
| Erase/program error bit. More... | |
| #define | AT25_STATUS_EPE_ERROR (1 << 5) |
| Erase or program error detected. More... | |
| #define | AT25_STATUS_EPE_SUCCESS (0 << 5) |
| Erase or program operation is successful. More... | |
| #define | AT25_STATUS_RDYBSY (1 << 0) |
| Device ready/busy status bit. More... | |
| #define | AT25_STATUS_RDYBSY_BUSY (1 << 0) |
| Device is busy with internal operations. More... | |
| #define | AT25_STATUS_RDYBSY_READY (0 << 0) |
| Device is ready. More... | |
| #define | AT25_STATUS_SPRL (1 << 7) |
| Sector protection registers locked bit. More... | |
| #define | AT25_STATUS_SPRL_LOCKED (1 << 7) |
| Sector protection registers are locked. More... | |
| #define | AT25_STATUS_SPRL_UNLOCKED (0 << 7) |
| Sector protection registers are unlocked. More... | |
| #define | AT25_STATUS_SWP (3 << 2) |
| Software protection status bitfield. More... | |
| #define | AT25_STATUS_SWP_PROTALL (3 << 2) |
| All sectors are software protected. More... | |
| #define | AT25_STATUS_SWP_PROTNONE (0 << 2) |
| No sector is software protected. More... | |
| #define | AT25_STATUS_SWP_PROTSOME (1 << 2) |
| Some sectors are software protected. More... | |
| #define | AT25_STATUS_WEL (1 << 1) |
| Write enable latch status bit. More... | |
| #define | AT25_STATUS_WEL_DISABLED (0 << 1) |
| Device is not write enabled. More... | |
| #define | AT25_STATUS_WEL_ENABLED (1 << 1) |
| Device is write enabled. More... | |
| #define | AT25_STATUS_WPP (1 << 4) |
| Write protect pin status bit. More... | |
| #define | AT25_STATUS_WPP_ASSERTED (1 << 4) |
| Write protect signal is asserted. More... | |
| #define | AT25_STATUS_WPP_NOTASSERTED (0 << 4) |
| Write protect signal is not asserted. More... | |
| #define | AT25_UNPROTECT_SECTOR 0x39 |
| Unprotect sector command code. More... | |
| #define | AT25_WRITE_DISABLE 0x04 |
| Write disable command code. More... | |
| #define | AT25_WRITE_ENABLE 0x06 |
| Write enable command code. More... | |
| #define | AT25_WRITE_STATUS 0x01 |
| Write status register command code. More... | |
| #define | ns_to_dlybct(ck, ns) ((((ns) / 32 * ((ck) / 1000000)) / 1000) + 1) |
| Convert ns to SPI DLYBCT. More... | |
| #define | ns_to_dlybs(ck, ns) ((((ns) * ((ck) / 1000000)) / 1000) + 1) |
| Convert ns to SPI DLYBS. More... | |
| #define | OFFSET_CSR 0x30 |
| Register offset for _CSR. More... | |
| #define | OFFSET_IER 0x14 |
| Register offset for _IMR. More... | |
| #define | OFFSET_MR 0x04 |
| Register offset for _MR. More... | |
| #define | SPI_CLK_PHASE 0 |
| Clock phase. More... | |
| #define | SPI_CLK_POLARITY 1 |
| Clock polarity. More... | |
| #define | SPI_DLYBCT 0x10 |
| Delay between consecutive transfers. More... | |
| #define | SPI_DLYBS 0x40 |
| Delay before SPCK. More... | |
| #define | TEST_CLOCK 10000000 |
| Test SPI clock. More... | |
| #define | TEST_DF_DLYBCT ns_to_dlybct(sysclk_get_cpu_hz(), 5) |
| DLYBCT to use for DF. More... | |
| #define | TEST_DF_DLYBS ns_to_dlybs(sysclk_get_cpu_hz(), 10) |
| DLYBS to use for DF. More... | |
| #define | TEST_DF_PCS ((~(1u << CONF_TEST_DF_NPCS)) & 0xF) |
| PCS to use for DF test. More... | |
| #define | TEST_PATTERN 0xA5 |
| Byte to transfer for test. More... | |
| #define | TEST_PCS ((~(1u << CONF_TEST_SPI_NPCS)) & 0xF) |
| PCS to use for test. More... | |
Typedefs | |
| typedef struct at25_command | at25_cmd_t |
| AT25 command struct. More... | |
| typedef struct spi_command | spi_cmd_t |
| SPI command to send. More... | |
Functions | |
| static bool | at25_enable_write (void) |
| Enable serial flash write. More... | |
| static bool | at25_erase_block_4k (const uint32_t address) |
| Erase 4K block. More... | |
| static bool | at25_read (const uint32_t address, uint8_t *p_buf, uint32_t size) |
| Read from serial flash. More... | |
| static bool | at25_read_id (uint32_t *p_id) |
| Read the ID of serial flash. More... | |
| static bool | at25_read_status (uint8_t *p_status) |
| Read status register of serial flash. More... | |
| static bool | at25_unprotect_sector (const uint32_t address) |
| Unprotect a sector. More... | |
| static bool | at25_wait (uint8_t *p_status) |
| Wait until serial flash is ready. More... | |
| static bool | at25_write (const uint32_t address, uint8_t *p_buf, uint32_t size) |
| Write to serial flash. More... | |
| void | CONF_TEST_SPI_HANDLER (void) |
| Test SPI interrupt handler. More... | |
| int | main (void) |
| Run SPI driver unit test. More... | |
| static void | run_spi_ctrl_test (const struct test_case *test) |
| Test SPI setting. More... | |
| static void | run_spi_dataflash_test (const struct test_case *test) |
| Test SPI dataflash operations. More... | |
| static void | run_spi_trans_test (const struct test_case *test) |
| Test SPI transfer. More... | |
| static void | run_spi_writeprotect_test (const struct test_case *test) |
| Test SPI write protection. More... | |
| static bool | spi_send_cmd (spi_cmd_t *p_cmd) |
| Send command to dataflash. More... | |
Variables | |
| volatile bool | g_b_spi_interrupt_rx_ready = false |
| RX interrupt occurred. More... | |
| volatile bool | g_b_spi_interrupt_tx_ready = false |
| TX interrupt occurred. More... | |
| #define AT25_BLOCK_ERASE_32K 0x52 |
Block erase command code (32K block).
| #define AT25_BLOCK_ERASE_4K 0x20 |
Block erase command code (4K block).
Referenced by at25_erase_block_4k().
| #define AT25_BLOCK_ERASE_64K 0xD8 |
Block erase command code (64K block).
| #define AT25_BYTE_PAGE_PROGRAM 0x02 |
Byte/page program command code.
Referenced by at25_write().
| #define AT25_CHIP_ERASE_1 0x60 |
Chip erase command code 1.
| #define AT25_CHIP_ERASE_2 0xC7 |
Chip erase command code 2.
| #define AT25_DEEP_PDOWN 0xB9 |
Deep power-down command code.
| #define AT25_PROTECT_SECTOR 0x36 |
Protect sector command code.
| #define AT25_READ_ARRAY 0x0B |
Read array command code.
Referenced by at25_read().
| #define AT25_READ_ARRAY_LF 0x03 |
Read array (low frequency) command code.
| #define AT25_READ_JEDEC_ID 0x9F |
Read manufacturer and device ID command code.
Referenced by at25_read_id().
| #define AT25_READ_SECTOR_PROT 0x3C |
Read sector protection registers command code.
| #define AT25_READ_STATUS 0x05 |
Read status register command code.
Referenced by at25_read_status().
| #define AT25_RES_DEEP_PDOWN 0xAB |
Resume from deep power-down command code.
| #define AT25_SEQUENTIAL_PROGRAM_1 0xAD |
Sequential program mode command code 1.
| #define AT25_SEQUENTIAL_PROGRAM_2 0xAF |
Sequential program mode command code 2.
| #define AT25_STATUS_EPE (1 << 5) |
Erase/program error bit.
Referenced by at25_erase_block_4k(), at25_unprotect_sector(), and at25_write().
| #define AT25_STATUS_EPE_ERROR (1 << 5) |
Erase or program error detected.
| #define AT25_STATUS_EPE_SUCCESS (0 << 5) |
Erase or program operation is successful.
| #define AT25_STATUS_RDYBSY (1 << 0) |
Device ready/busy status bit.
Referenced by at25_wait().
| #define AT25_STATUS_RDYBSY_BUSY (1 << 0) |
Device is busy with internal operations.
| #define AT25_STATUS_RDYBSY_READY (0 << 0) |
Device is ready.
| #define AT25_STATUS_SPRL (1 << 7) |
Sector protection registers locked bit.
| #define AT25_STATUS_SPRL_LOCKED (1 << 7) |
Sector protection registers are locked.
| #define AT25_STATUS_SPRL_UNLOCKED (0 << 7) |
Sector protection registers are unlocked.
| #define AT25_STATUS_SWP (3 << 2) |
Software protection status bitfield.
| #define AT25_STATUS_SWP_PROTALL (3 << 2) |
All sectors are software protected.
| #define AT25_STATUS_SWP_PROTNONE (0 << 2) |
No sector is software protected.
| #define AT25_STATUS_SWP_PROTSOME (1 << 2) |
Some sectors are software protected.
| #define AT25_STATUS_WEL (1 << 1) |
Write enable latch status bit.
| #define AT25_STATUS_WEL_DISABLED (0 << 1) |
Device is not write enabled.
| #define AT25_STATUS_WEL_ENABLED (1 << 1) |
Device is write enabled.
| #define AT25_STATUS_WPP (1 << 4) |
Write protect pin status bit.
| #define AT25_STATUS_WPP_ASSERTED (1 << 4) |
Write protect signal is asserted.
| #define AT25_STATUS_WPP_NOTASSERTED (0 << 4) |
Write protect signal is not asserted.
| #define AT25_UNPROTECT_SECTOR 0x39 |
Unprotect sector command code.
Referenced by at25_unprotect_sector().
| #define AT25_WRITE_DISABLE 0x04 |
Write disable command code.
| #define AT25_WRITE_ENABLE 0x06 |
Write enable command code.
Referenced by at25_enable_write().
| #define AT25_WRITE_STATUS 0x01 |
Write status register command code.
| #define ns_to_dlybct | ( | ck, | |
| ns | |||
| ) | ((((ns) / 32 * ((ck) / 1000000)) / 1000) + 1) |
Convert ns to SPI DLYBCT.
| #define ns_to_dlybs | ( | ck, | |
| ns | |||
| ) | ((((ns) * ((ck) / 1000000)) / 1000) + 1) |
Convert ns to SPI DLYBS.
| #define OFFSET_CSR 0x30 |
Register offset for _CSR.
Referenced by run_spi_writeprotect_test().
| #define OFFSET_IER 0x14 |
Register offset for _IMR.
| #define OFFSET_MR 0x04 |
Register offset for _MR.
Referenced by run_spi_writeprotect_test().
| #define SPI_CLK_PHASE 0 |
Clock phase.
Referenced by run_spi_dataflash_test(), and run_spi_trans_test().
| #define SPI_CLK_POLARITY 1 |
Clock polarity.
Referenced by run_spi_dataflash_test(), and run_spi_trans_test().
| #define SPI_DLYBCT 0x10 |
Delay between consecutive transfers.
Referenced by run_spi_trans_test().
| #define SPI_DLYBS 0x40 |
Delay before SPCK.
Referenced by run_spi_trans_test().
| #define TEST_CLOCK 10000000 |
Test SPI clock.
Referenced by run_spi_dataflash_test(), and run_spi_trans_test().
| #define TEST_DF_DLYBCT ns_to_dlybct(sysclk_get_cpu_hz(), 5) |
DLYBCT to use for DF.
Referenced by run_spi_dataflash_test().
| #define TEST_DF_DLYBS ns_to_dlybs(sysclk_get_cpu_hz(), 10) |
DLYBS to use for DF.
Referenced by run_spi_dataflash_test().
| #define TEST_DF_PCS ((~(1u << CONF_TEST_DF_NPCS)) & 0xF) |
PCS to use for DF test.
Referenced by spi_send_cmd().
| #define TEST_PATTERN 0xA5 |
Byte to transfer for test.
Referenced by run_spi_trans_test().
| #define TEST_PCS ((~(1u << CONF_TEST_SPI_NPCS)) & 0xF) |
PCS to use for test.
Referenced by run_spi_trans_test().
| typedef struct at25_command at25_cmd_t |
AT25 command struct.
| typedef struct spi_command spi_cmd_t |
SPI command to send.
|
static |
Enable serial flash write.
References AT25_WRITE_ENABLE, spi_command::data, at25_command::op_code, and spi_send_cmd().
Referenced by at25_erase_block_4k(), at25_unprotect_sector(), at25_write(), and run_spi_dataflash_test().
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static |
Erase 4K block.
| address | Serial flash internal address. |
References at25_command::address_h, at25_command::address_l, at25_command::address_m, AT25_BLOCK_ERASE_4K, at25_enable_write(), AT25_STATUS_EPE, at25_wait(), spi_command::data, at25_command::op_code, and spi_send_cmd().
Referenced by run_spi_dataflash_test().
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static |
Read from serial flash.
| address | Serial flash internal address. |
| p_buf | Pointer to data buffer to fill. |
| size | Data buffer size. |
References at25_command::address_h, at25_command::address_l, at25_command::address_m, AT25_READ_ARRAY, spi_command::data, at25_command::op_code, and spi_send_cmd().
Referenced by run_spi_dataflash_test().
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static |
Read the ID of serial flash.
| p_id | Pointer to fill ID result (word of 4 bytes). |
References AT25_READ_JEDEC_ID, spi_command::data, at25_command::op_code, and spi_send_cmd().
Referenced by run_spi_dataflash_test().
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static |
Read status register of serial flash.
| p_status | Pointer to fill status result. |
References AT25_READ_STATUS, spi_command::data, at25_command::op_code, and spi_send_cmd().
Referenced by at25_wait(), and run_spi_dataflash_test().
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Unprotect a sector.
| address | Serial flash internal address. |
References at25_command::address_h, at25_command::address_l, at25_command::address_m, at25_enable_write(), AT25_STATUS_EPE, AT25_UNPROTECT_SECTOR, at25_wait(), spi_command::data, at25_command::op_code, and spi_send_cmd().
Referenced by run_spi_dataflash_test().
|
static |
Wait until serial flash is ready.
| p_status | Optional pointer to return the latest status. |
References at25_read_status(), and AT25_STATUS_RDYBSY.
Referenced by at25_erase_block_4k(), at25_unprotect_sector(), and at25_write().
|
static |
Write to serial flash.
| address | Serial flash internal address. |
| p_buf | Pointer to data buffer to send. |
| size | Data buffer size. |
References at25_command::address_h, at25_command::address_l, at25_command::address_m, AT25_BYTE_PAGE_PROGRAM, at25_enable_write(), AT25_STATUS_EPE, at25_wait(), spi_command::data, at25_command::op_code, and spi_send_cmd().
Referenced by run_spi_dataflash_test().
| void CONF_TEST_SPI_HANDLER | ( | void | ) |
Test SPI interrupt handler.
References CONF_TEST_SPI, g_b_spi_interrupt_rx_ready, g_b_spi_interrupt_tx_ready, spi_disable_interrupt(), and spi_read_status().
| int main | ( | void | ) |
Run SPI driver unit test.
References uart_rs232_options::baudrate, board_init(), CONF_TEST_BAUDRATE, CONF_TEST_CHARLENGTH, CONF_TEST_PARITY, CONF_TEST_STOPBITS, CONF_TEST_USART, DEFINE_TEST_ARRAY, DEFINE_TEST_CASE, DEFINE_TEST_SUITE, run_spi_ctrl_test(), run_spi_dataflash_test(), run_spi_trans_test(), run_spi_writeprotect_test(), stdio_serial_init(), sysclk_init(), and test_suite_run().
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static |
Test SPI setting.
This test tests SPI reset/enable/disable.
| test | Current test case. |
References CONF_TEST_SPI, SAM4L, spi_enable(), spi_enable_clock(), spi_is_enabled(), spi_reset(), and test_assert_true.
Referenced by main().
|
static |
Test SPI dataflash operations.
| test | Current test case. |
References at25_enable_write(), at25_erase_block_4k(), at25_read(), at25_read_id(), at25_read_status(), at25_unprotect_sector(), at25_write(), CONF_TEST_DF_ADDRESS, CONF_TEST_DF_ID, CONF_TEST_DF_NPCS, CONF_TEST_DF_PAGE_SIZE, CONF_TEST_SPI, SAM4L, SPI_CLK_PHASE, SPI_CLK_POLARITY, spi_configure_cs_behavior(), SPI_CS_KEEP_LOW, spi_enable(), spi_set_baudrate_div(), spi_set_bits_per_transfer(), spi_set_clock_phase(), spi_set_clock_polarity(), spi_set_master_mode(), spi_set_peripheral_chip_select_value(), spi_set_transfer_delay(), spi_set_variable_peripheral_select(), sysclk_get_pba_hz(), test_assert_true, TEST_CLOCK, TEST_DF_DLYBCT, and TEST_DF_DLYBS.
Referenced by main().
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static |
Test SPI transfer.
This test tests SPI read/write.
| test | Current test case. |
References CONF_TEST_SPI, CONF_TEST_SPI_ID, CONF_TEST_SPI_NPCS, g_b_spi_interrupt_rx_ready, g_b_spi_interrupt_tx_ready, SAM4L, SPI_CLK_PHASE, SPI_CLK_POLARITY, spi_disable(), spi_disable_interrupt(), spi_disable_loopback(), spi_disable_mode_fault_detect(), SPI_DLYBCT, SPI_DLYBS, spi_enable(), spi_enable_interrupt(), spi_enable_loopback(), SPI_ERROR_TIMEOUT, SPI_OK, spi_read(), spi_reset(), spi_set_baudrate_div(), spi_set_bits_per_transfer(), spi_set_clock_phase(), spi_set_clock_polarity(), spi_set_lastxfer(), spi_set_master_mode(), spi_set_peripheral_chip_select_value(), spi_set_transfer_delay(), spi_set_variable_peripheral_select(), spi_write(), sysclk_get_pba_hz(), test_assert_true, TEST_CLOCK, TEST_PATTERN, and TEST_PCS.
Referenced by main().
|
static |
Test SPI write protection.
| test | Current test case. |
References CONF_TEST_SPI, CONF_TEST_SPI_NPCS, OFFSET_CSR, OFFSET_MR, spi_get_writeprotect_status(), spi_set_writeprotect(), and test_assert_true.
Referenced by main().
Send command to dataflash.
References spi_command::cmd, spi_command::cmd_rx, spi_command::cmd_size, CONF_TEST_SPI, spi_command::data, spi_command::data_size, spi_command::dummy_size, spi_is_rx_full(), spi_is_tx_empty(), SPI_OK, spi_read(), spi_write(), and TEST_DF_PCS.
Referenced by at25_enable_write(), at25_erase_block_4k(), at25_read(), at25_read_id(), at25_read_status(), at25_unprotect_sector(), and at25_write().
RX interrupt occurred.
Referenced by CONF_TEST_SPI_HANDLER(), and run_spi_trans_test().
TX interrupt occurred.
Referenced by CONF_TEST_SPI_HANDLER(), and run_spi_trans_test().
1.8.5