Management of the AT45DBX data flash driver through SPI.
This file manages the accesses to the AT45DBX data flash components.
Copyright (c) 2011-2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
| #define | AT45DBX_CHIP_UNSELECT(addr) (((addr)<=0) ? 0 : ((addr)-1)) |
| Address shifter to unselect correct DF. More... | |
| #define | AT45DBX_MSK_PTR_BYTE ((1 << AT45DBX_PAGE_BITS) - 1) |
| Bit-mask for byte position within buffer in at45dbx_gl_ptr_mem. More... | |
| #define | AT45DBX_MSK_PTR_PAGE (((1 << AT45DBX_PAGE_ADDR_BITS) - 1) << AT45DBX_PAGE_BITS) |
| Bit-mask for page selection in at45dbx_gl_ptr_mem. More... | |
| #define | AT45DBX_MSK_PTR_SECTOR ((1 << AT45DBX_SECTOR_BITS) - 1) |
| Bit-mask for byte position within sector in at45dbx_gl_ptr_mem. More... | |
| #define | AT45DBX_PAGE_ADDR_BITS (AT45DBX_MEM_SIZE - AT45DBX_PAGE_BITS) |
| Address bits for page selection. More... | |
| #define | AT45DBX_PAGE_BITS (AT45DBX_BYTE_ADDR_BITS - 1) |
| Number of bits for addresses within pages. More... | |
| #define | AT45DBX_PAGE_SIZE (1 << AT45DBX_PAGE_BITS) |
| Page size in bytes. More... | |
| #define | spi_write_dummy() spi_write(AT45DBX_SPI, 0xFF) |
| Sends a dummy byte through SPI. More... | |
AT45DBX Group A Commands | |
| #define | AT45DBX_CMDA_RD_PAGE 0xD2 |
| Main Memory Page Read (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDA_RD_ARRAY_LEG 0xE8 |
| Continuous Array Read, Legacy Command (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDA_RD_ARRAY_LF_SM 0x03 |
| Continuous Array Read, Low-Frequency Mode (Serial Mode). More... | |
| #define | AT45DBX_CMDA_RD_ARRAY_AF_SM 0x0B |
| Continuous Array Read, Any-Frequency Mode (Serial Mode). More... | |
| #define | AT45DBX_CMDA_RD_SECTOR_PROT_REG 0x32 |
| Read Sector Protection Register (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDA_RD_SECTOR_LKDN_REG 0x35 |
| Read Sector Lockdown Register (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDA_RD_SECURITY_REG 0x77 |
| Read Security Register (Serial/8-bit Mode). More... | |
AT45DBX Group B Commands | |
| #define | AT45DBX_CMDB_ER_PAGE 0x81 |
| Page Erase (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_ER_BLOCK 0x50 |
| Block Erase (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_ER_SECTOR 0x7C |
| Sector Erase (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_ER_CHIP 0xC794809A |
| Chip Erase (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_XFR_PAGE_TO_BUF1 0x53 |
| Main Memory Page to Buffer 1 Transfer (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_XFR_PAGE_TO_BUF2 0x55 |
| Main Memory Page to Buffer 2 Transfer (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_CMP_PAGE_TO_BUF1 0x60 |
| Main Memory Page to Buffer 1 Compare (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_CMP_PAGE_TO_BUF2 0x61 |
| Main Memory Page to Buffer 2 Compare (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_PR_BUF1_TO_PAGE_ER 0x83 |
| Buffer 1 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_PR_BUF2_TO_PAGE_ER 0x86 |
| Buffer 2 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_PR_BUF1_TO_PAGE 0x88 |
| Buffer 1 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_PR_BUF2_TO_PAGE 0x89 |
| Buffer 2 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_PR_PAGE_TH_BUF1 0x82 |
| Main Memory Page Program through Buffer 1 (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_PR_PAGE_TH_BUF2 0x85 |
| Main Memory Page Program through Buffer 2 (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_RWR_PAGE_TH_BUF1 0x58 |
| Auto Page Rewrite through Buffer 1 (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDB_RWR_PAGE_TH_BUF2 0x59 |
| Auto Page Rewrite through Buffer 2 (Serial/8-bit Mode). More... | |
AT45DBX Group C Commands | |
| #define | AT45DBX_CMDC_RD_BUF1_LF_SM 0xD1 |
| Buffer 1 Read, Low-Frequency Mode (Serial Mode). More... | |
| #define | AT45DBX_CMDC_RD_BUF2_LF_SM 0xD3 |
| Buffer 2 Read, Low-Frequency Mode (Serial Mode). More... | |
| #define | AT45DBX_CMDC_RD_BUF1_AF_SM 0xD4 |
| Buffer 1 Read, Any-Frequency Mode (Serial Mode). More... | |
| #define | AT45DBX_CMDC_RD_BUF2_AF_SM 0xD6 |
| Buffer 2 Read, Any-Frequency Mode (Serial Mode). More... | |
| #define | AT45DBX_CMDC_RD_BUF1_AF_8M 0x54 |
| Buffer 1 Read, Any-Frequency Mode (8-bit Mode). More... | |
| #define | AT45DBX_CMDC_RD_BUF2_AF_8M 0x56 |
| Buffer 2 Read, Any-Frequency Mode (8-bit Mode). More... | |
| #define | AT45DBX_CMDC_WR_BUF1 0x84 |
| Buffer 1 Write (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDC_WR_BUF2 0x87 |
| Buffer 2 Write (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDC_RD_STATUS_REG 0xD7 |
| Status Register Read (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDC_RD_MNFCT_DEV_ID_SM 0x9F |
| Manufacturer and Device ID Read (Serial Mode). More... | |
AT45DBX Group D Commands | |
| #define | AT45DBX_CMDD_EN_SECTOR_PROT 0x3D2A7FA9 |
| Enable Sector Protection (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDD_DIS_SECTOR_PROT 0x3D2A7F9A |
| Disable Sector Protection (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDD_ER_SECTOR_PROT_REG 0x3D2A7FCF |
| Erase Sector Protection Register (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDD_PR_SECTOR_PROT_REG 0x3D2A7FFC |
| Program Sector Protection Register (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDD_LKDN_SECTOR 0x3D2A7F30 |
| Sector Lockdown (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDD_PR_SECURITY_REG 0x9B000000 |
| Program Security Register (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDD_PR_CONF_REG 0x3D2A80A6 |
| Program Configuration Register (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDD_DEEP_PWR_DN 0xB9 |
| Deep Power-down (Serial/8-bit Mode). More... | |
| #define | AT45DBX_CMDD_RSM_DEEP_PWR_DN 0xAB |
| Resume from Deep Power-down (Serial/8-bit Mode). More... | |
Bit-Masks and Values for the Status Register | |
| #define | AT45DBX_MSK_BUSY 0x80 |
| Busy status bit-mask. More... | |
| #define | AT45DBX_BUSY 0x00 |
| Busy status value (0x00 when busy, 0x80 when ready). More... | |
| #define | AT45DBX_MSK_DENSITY 0x3C |
| Device density bit-mask. More... | |
Functions | |
Control Functions | |
| bool | at45dbx_init (void) |
| Initializes the data flash controller and the SPI channel by which the DF is controlled. More... | |
| static void | at45dbx_chipselect_df (uint8_t memidx, bool bSelect) |
| Selects or unselects a DF memory. More... | |
| bool | at45dbx_mem_check (void) |
| Performs a memory check on all DataFlash memories. More... | |
| static void | at45dbx_wait_ready (void) |
| bool | at45dbx_read_sector_open (uint32_t sector) |
| Opens a DataFlash memory in read mode at a given sector. More... | |
| bool | at45dbx_read_byte_open (uint32_t ad) |
| Opens a DataFlash memory in read mode at a given byte address. More... | |
| void | at45dbx_read_close (void) |
| Unselects the current DataFlash memory. More... | |
| bool | at45dbx_write_sector_open (uint32_t sector) |
| This function opens a DataFlash memory in write mode at a given sector. More... | |
| bool | at45dbx_write_byte_open (uint32_t ad) |
| This function opens a DataFlash memory in write mode at a given address. More... | |
| void | at45dbx_write_close (void) |
| Fills the end of the current logical sector and launches page programming. More... | |
Single-Byte Access Functions | |
| uint8_t | at45dbx_read_byte (void) |
| Performs a single byte read from DataFlash memory. More... | |
| bool | at45dbx_write_byte (uint8_t b) |
| Performs a single byte write to DataFlash memory. More... | |
Single-Sector Access Functions | |
| bool | at45dbx_read_sector_to_ram (void *ram) |
| Reads one DataFlash sector to a RAM buffer. More... | |
| bool | at45dbx_write_sector_from_ram (const void *ram) |
| Writes one DataFlash sector from a RAM buffer. More... | |
Variables | |
| static bool | at45dbx_busy |
| Boolean indicating whether memory is in busy state. More... | |
| static uint32_t | at45dbx_gl_ptr_mem |
| Memory data pointer. More... | |
| #define AT45DBX_BUSY 0x00 |
Busy status value (0x00 when busy, 0x80 when ready).
Referenced by at45dbx_wait_ready().
Address shifter to unselect correct DF.
Referenced by at45dbx_read_byte(), at45dbx_read_close(), at45dbx_write_byte(), at45dbx_write_close(), and at45dbx_write_sector_from_ram().
| #define AT45DBX_CMDA_RD_ARRAY_AF_SM 0x0B |
Continuous Array Read, Any-Frequency Mode (Serial Mode).
| #define AT45DBX_CMDA_RD_ARRAY_LEG 0xE8 |
Continuous Array Read, Legacy Command (Serial/8-bit Mode).
| #define AT45DBX_CMDA_RD_ARRAY_LF_SM 0x03 |
Continuous Array Read, Low-Frequency Mode (Serial Mode).
| #define AT45DBX_CMDA_RD_PAGE 0xD2 |
Main Memory Page Read (Serial/8-bit Mode).
Referenced by at45dbx_read_byte_open().
| #define AT45DBX_CMDA_RD_SECTOR_LKDN_REG 0x35 |
Read Sector Lockdown Register (Serial/8-bit Mode).
| #define AT45DBX_CMDA_RD_SECTOR_PROT_REG 0x32 |
Read Sector Protection Register (Serial/8-bit Mode).
| #define AT45DBX_CMDA_RD_SECURITY_REG 0x77 |
Read Security Register (Serial/8-bit Mode).
| #define AT45DBX_CMDB_CMP_PAGE_TO_BUF1 0x60 |
Main Memory Page to Buffer 1 Compare (Serial/8-bit Mode).
| #define AT45DBX_CMDB_CMP_PAGE_TO_BUF2 0x61 |
Main Memory Page to Buffer 2 Compare (Serial/8-bit Mode).
| #define AT45DBX_CMDB_ER_BLOCK 0x50 |
Block Erase (Serial/8-bit Mode).
| #define AT45DBX_CMDB_ER_CHIP 0xC794809A |
Chip Erase (Serial/8-bit Mode).
| #define AT45DBX_CMDB_ER_PAGE 0x81 |
Page Erase (Serial/8-bit Mode).
| #define AT45DBX_CMDB_ER_SECTOR 0x7C |
Sector Erase (Serial/8-bit Mode).
| #define AT45DBX_CMDB_PR_BUF1_TO_PAGE 0x88 |
Buffer 1 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode).
| #define AT45DBX_CMDB_PR_BUF1_TO_PAGE_ER 0x83 |
Buffer 1 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode).
| #define AT45DBX_CMDB_PR_BUF2_TO_PAGE 0x89 |
Buffer 2 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode).
| #define AT45DBX_CMDB_PR_BUF2_TO_PAGE_ER 0x86 |
Buffer 2 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode).
| #define AT45DBX_CMDB_PR_PAGE_TH_BUF1 0x82 |
Main Memory Page Program through Buffer 1 (Serial/8-bit Mode).
Referenced by at45dbx_write_byte_open().
| #define AT45DBX_CMDB_PR_PAGE_TH_BUF2 0x85 |
Main Memory Page Program through Buffer 2 (Serial/8-bit Mode).
| #define AT45DBX_CMDB_RWR_PAGE_TH_BUF1 0x58 |
Auto Page Rewrite through Buffer 1 (Serial/8-bit Mode).
| #define AT45DBX_CMDB_RWR_PAGE_TH_BUF2 0x59 |
Auto Page Rewrite through Buffer 2 (Serial/8-bit Mode).
| #define AT45DBX_CMDB_XFR_PAGE_TO_BUF1 0x53 |
Main Memory Page to Buffer 1 Transfer (Serial/8-bit Mode).
Referenced by at45dbx_write_byte_open().
| #define AT45DBX_CMDB_XFR_PAGE_TO_BUF2 0x55 |
Main Memory Page to Buffer 2 Transfer (Serial/8-bit Mode).
| #define AT45DBX_CMDC_RD_BUF1_AF_8M 0x54 |
Buffer 1 Read, Any-Frequency Mode (8-bit Mode).
| #define AT45DBX_CMDC_RD_BUF1_AF_SM 0xD4 |
Buffer 1 Read, Any-Frequency Mode (Serial Mode).
| #define AT45DBX_CMDC_RD_BUF1_LF_SM 0xD1 |
Buffer 1 Read, Low-Frequency Mode (Serial Mode).
| #define AT45DBX_CMDC_RD_BUF2_AF_8M 0x56 |
Buffer 2 Read, Any-Frequency Mode (8-bit Mode).
| #define AT45DBX_CMDC_RD_BUF2_AF_SM 0xD6 |
Buffer 2 Read, Any-Frequency Mode (Serial Mode).
| #define AT45DBX_CMDC_RD_BUF2_LF_SM 0xD3 |
Buffer 2 Read, Low-Frequency Mode (Serial Mode).
| #define AT45DBX_CMDC_RD_MNFCT_DEV_ID_SM 0x9F |
Manufacturer and Device ID Read (Serial Mode).
| #define AT45DBX_CMDC_RD_STATUS_REG 0xD7 |
Status Register Read (Serial/8-bit Mode).
Referenced by at45dbx_mem_check(), and at45dbx_wait_ready().
| #define AT45DBX_CMDC_WR_BUF1 0x84 |
Buffer 1 Write (Serial/8-bit Mode).
| #define AT45DBX_CMDC_WR_BUF2 0x87 |
Buffer 2 Write (Serial/8-bit Mode).
| #define AT45DBX_CMDD_DEEP_PWR_DN 0xB9 |
Deep Power-down (Serial/8-bit Mode).
| #define AT45DBX_CMDD_DIS_SECTOR_PROT 0x3D2A7F9A |
Disable Sector Protection (Serial/8-bit Mode).
| #define AT45DBX_CMDD_EN_SECTOR_PROT 0x3D2A7FA9 |
Enable Sector Protection (Serial/8-bit Mode).
| #define AT45DBX_CMDD_ER_SECTOR_PROT_REG 0x3D2A7FCF |
Erase Sector Protection Register (Serial/8-bit Mode).
| #define AT45DBX_CMDD_LKDN_SECTOR 0x3D2A7F30 |
Sector Lockdown (Serial/8-bit Mode).
| #define AT45DBX_CMDD_PR_CONF_REG 0x3D2A80A6 |
Program Configuration Register (Serial/8-bit Mode).
| #define AT45DBX_CMDD_PR_SECTOR_PROT_REG 0x3D2A7FFC |
Program Sector Protection Register (Serial/8-bit Mode).
| #define AT45DBX_CMDD_PR_SECURITY_REG 0x9B000000 |
Program Security Register (Serial/8-bit Mode).
| #define AT45DBX_CMDD_RSM_DEEP_PWR_DN 0xAB |
Resume from Deep Power-down (Serial/8-bit Mode).
| #define AT45DBX_MSK_BUSY 0x80 |
Busy status bit-mask.
Referenced by at45dbx_wait_ready().
| #define AT45DBX_MSK_DENSITY 0x3C |
Device density bit-mask.
Referenced by at45dbx_mem_check().
| #define AT45DBX_MSK_PTR_BYTE ((1 << AT45DBX_PAGE_BITS) - 1) |
Bit-mask for byte position within buffer in at45dbx_gl_ptr_mem.
Referenced by at45dbx_read_byte(), at45dbx_read_byte_open(), at45dbx_write_byte(), at45dbx_write_byte_open(), and at45dbx_write_sector_from_ram().
| #define AT45DBX_MSK_PTR_PAGE (((1 << AT45DBX_PAGE_ADDR_BITS) - 1) << AT45DBX_PAGE_BITS) |
Bit-mask for page selection in at45dbx_gl_ptr_mem.
Referenced by at45dbx_read_byte_open(), and at45dbx_write_byte_open().
| #define AT45DBX_MSK_PTR_SECTOR ((1 << AT45DBX_SECTOR_BITS) - 1) |
Bit-mask for byte position within sector in at45dbx_gl_ptr_mem.
Referenced by at45dbx_write_close().
| #define AT45DBX_PAGE_ADDR_BITS (AT45DBX_MEM_SIZE - AT45DBX_PAGE_BITS) |
Address bits for page selection.
| #define AT45DBX_PAGE_BITS (AT45DBX_BYTE_ADDR_BITS - 1) |
Number of bits for addresses within pages.
| #define AT45DBX_PAGE_SIZE (1 << AT45DBX_PAGE_BITS) |
Page size in bytes.
Referenced by at45dbx_df_2_ram(), at45dbx_ram_2_df(), and at45dbx_write_sector_from_ram().
| #define spi_write_dummy | ( | ) | spi_write(AT45DBX_SPI, 0xFF) |
Sends a dummy byte through SPI.
|
static |
Boolean indicating whether memory is in busy state.
Referenced by at45dbx_read_byte(), at45dbx_read_byte_open(), at45dbx_read_close(), at45dbx_write_byte(), at45dbx_write_byte_open(), at45dbx_write_close(), and at45dbx_write_sector_from_ram().
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static |
Memory data pointer.
Referenced by at45dbx_read_byte(), at45dbx_read_byte_open(), at45dbx_read_close(), at45dbx_wait_ready(), at45dbx_write_byte(), at45dbx_write_byte_open(), at45dbx_write_close(), and at45dbx_write_sector_from_ram().
1.8.5