Quickstart guide for SDRAMC driver.

This is the quickstart guide for the SDRAM Controller, with step-by-step instructions on how to configure and use the driver in a selection of use cases.

The use cases contain several code fragments. The code fragments in the steps for setup can be copied into a custom initialization function, while the steps for usage can be copied into, e.g., the main application function.

Basic use case

In the basic use case, the SDMRAC driver are configured for:

• SDRAM component MT48C16M16A2 is used
• Write/Read access to the MT48C16M16A2

Setup steps

Prerequisites

1. System Clock Management (sysclock)
2. Parallel Input/Output Controller (pio)
3. Power Management Controller (pmc)

Example code

The macro of CONF_BOARD_SDRAMC must be added to the project:

#define CONF_BOARD_SDRAMC

A speicific sdramc device must be defined.

const sdramc_memory_dev_t SDRAM_MICRON_MT48LC16M16A2 = {
  24,
  0,
  {
    SDRAMC_CR_NC_COL9      |
    SDRAMC_CR_NR_ROW13     |
    SDRAMC_CR_NB_BANK4     |
    SDRAMC_CR_CAS_LATENCY2 |
    SDRAMC_CR_DBW          |
    SDRAMC_CR_TWR(2)       |
    SDRAMC_CR_TRC_TRFC(9)  |
    SDRAMC_CR_TRP(3)       |
    SDRAMC_CR_TRCD(3)      |
    SDRAMC_CR_TRAS(6)      |
    SDRAMC_CR_TXSR(10)
  },
};

Add to application C-file:

sysclk_init();
board_init();
sdramc_init((sdramc_memory_dev_t *)&SDRAM_MICRON_MT48LC16M16A2,
           sysclk_get_cpu_hz());

Workflow

1. Enable the PINs for SDRAMC:

   #define CONF_BOARD_SDRAMC

2. Initialize the SDRAM device:

• const sdramc_memory_dev_t SDRAM_MICRON_MT48LC16M16A2 = {

  1. Block1 is at the bit 24, 1(M0)+9(Col)+13(Row)+1(BK1):

     • 24,

  2. Set SDRAMC to normal mode 0:

     • 0,

  3. MT48LC16M16A2 has 9 column bits:

     • SDRAMC_CR_NC_COL9      |

  4. MT48LC16M16A2 has 13 row bits:

     • SDRAMC_CR_NR_ROW13     |

     1. MT48LC16M16A2 has 4 banks:

     • SDRAMC_CR_NB_BANK4     |

  5. Set CAS latency to 2 cycles:

     • SDRAMC_CR_CAS_LATENCY2 |

  6. The data bus width of MT48LC16M16A2 is 16 bits:

     • SDRAMC_CR_DBW          |

  7. Set Write Recovery Delay to 2 cycles:

     • SDRAMC_CR_TWR(2)       |

  8. Set Row Cycle Delay and Row Refresh Cycle to 9 cycles:

     • SDRAMC_CR_TRC_TRFC(9)  |

  9. Set Row Precharge Delay to 3 cycles:

     • SDRAMC_CR_TRP(3)       |

  10. Set Row to Column Delay to 3 cycles:

      • SDRAMC_CR_TRCD(3)      |

  11. Set Active to Precharge Delay to 6 cycles:

      • SDRAMC_CR_TRAS(6)      |

  12. Set Exit from Self Refresh to Active Delay to 10 cycles:

      • SDRAMC_CR_TXSR(10)

1. Enable system clock:

• sysclk_init(); 

1. Enable PIO configurations for SDRMAC:

• board_init(); 

1. Initialize MT48LC16M16A2 device:

• sdramc_init((sdramc_memory_dev_t *)&SDRAM_MICRON_MT48LC16M16A2,
            sysclk_get_cpu_hz());

Usage steps

Example code

Add to, e.g., main loop in application C-file:

uint32_t *pul = (uint32_t *)BOARD_SDRAM_ADDR;

pul[0] = 0xdeadbeef;
if (pul[0] == 0xdeadbeef) {
    LED_On(LED0_GPIO);
}

Workflow

1. Set the pointer to the SDRAMC address:

   • uint32_t *pul = (uint32_t *)BOARD_SDRAM_ADDR;

2. Write the specific data to the SDRAMC space:

   • pul[0] = 0xdeadbeef;

3. Read the data, if matched the specific data, turn on the LED0:

   • if (pul[0] == 0xdeadbeef) {
         LED_On(LED0_GPIO);
        }