LORAWAN Stack common include file.
Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries.
Macros | |
#define | ACCEPTED 1 |
#define | BATTERY_LEVEL_INVALID (0xFF) |
#define | BIT0 (1 << SHIFT0) |
#define | BIT1 (1 << SHIFT1) |
#define | BIT10 (1 << SHIFT10) |
#define | BIT11 (1 << SHIFT11) |
#define | BIT12 (1 << SHIFT12) |
#define | BIT13 (1 << SHIFT13) |
#define | BIT14 (1 << SHIFT14) |
#define | BIT15 (1 << SHIFT15) |
#define | BIT16 (1 << SHIFT16) |
#define | BIT17 (1 << SHIFT17) |
#define | BIT18 (1 << SHIFT18) |
#define | BIT19 (1 << SHIFT19) |
#define | BIT2 (1 << SHIFT2) |
#define | BIT20 (1 << SHIFT20) |
#define | BIT21 (1 << SHIFT21) |
#define | BIT22 (1 << SHIFT22) |
#define | BIT23 (1 << SHIFT23) |
#define | BIT24 (1 << SHIFT24) |
#define | BIT25 (1 << SHIFT25) |
#define | BIT26 (1 << SHIFT26) |
#define | BIT27 (1 << SHIFT27) |
#define | BIT28 (1 << SHIFT28) |
#define | BIT29 (1 << SHIFT29) |
#define | BIT3 (1 << SHIFT3) |
#define | BIT30 (1 << SHIFT30) |
#define | BIT31 (1 << SHIFT31) |
#define | BIT4 (1 << SHIFT4) |
#define | BIT5 (1 << SHIFT5) |
#define | BIT6 (1 << SHIFT6) |
#define | BIT7 (1 << SHIFT7) |
#define | BIT8 (1 << SHIFT8) |
#define | BIT9 (1 << SHIFT9) |
#define | BUILD_NUM "5" |
#define | BUILD_TYPE "P" /* E or P */ |
#define | DEFAULT_CALIBRATION_FREQ (FREQ_868100KHZ) |
#define | DISABLED 0 |
#define | ENABLED 1 |
#define | EXTERNALLY_POWERED (0x00) |
#define | FREQ_1020000KHZ 1020000000 |
#define | FREQ_137000KHZ 137000000 |
#define | FREQ_1600KHZ 1600000 |
#define | FREQ_175000KHZ 175000000 |
#define | FREQ_200KHZ 200000 |
#define | FREQ_410000KHZ 410000000 |
#define | FREQ_433050KHZ 433050000 |
#define | FREQ_433300KHZ 433300000 |
#define | FREQ_434665KHZ 434665000 |
#define | FREQ_434790KHZ 434790000 |
#define | FREQ_500KHZ 500000 |
#define | FREQ_525000KHZ 525000000 |
#define | FREQ_600KHZ 600000 |
#define | FREQ_786000KHZ 862000000 |
#define | FREQ_862000KHZ 862000000 |
#define | FREQ_863000KHZ 863000000 |
#define | FREQ_865000KHZ 865000000 |
#define | FREQ_866550KHZ 866550000 |
#define | FREQ_867000KHZ 867000000 |
#define | FREQ_868100KHZ 868100000 |
#define | FREQ_869525KHZ 869525000 |
#define | FREQ_870000KHZ 870000000 |
#define | FREQ_902300KHZ 902300000 |
#define | FREQ_903000KHZ 903000000 |
#define | FREQ_915000KHZ 915000000 |
#define | FREQ_915200KHZ 915200000 |
#define | FREQ_915900KHZ 915900000 |
#define | FREQ_920000KHZ 920000000 |
#define | FREQ_920900KHZ 920900000 |
#define | FREQ_921900KHZ 921900000 |
#define | FREQ_922000KHZ 922000000 |
#define | FREQ_922100KHZ 922100000 |
#define | FREQ_923000KHZ 923000000 |
#define | FREQ_923200KHZ 923200000 |
#define | FREQ_923300KHZ 923300000 |
#define | FREQ_925000KHZ 925000000 |
#define | FREQ_927500KHZ 927500000 |
#define | FREQ_928000KHZ 928000000 |
#define | FREQ_928500KHZ 928500000 |
#define | ISM_ASBAND ((1 << ISM_BRN923) | (1 << ISM_CMB923) | (1 << ISM_INS923) | (1 << ISM_NZ923) |(1 << ISM_SP923) | (1 << ISM_TWN923) | (1 << ISM_THAI923) | (1 << ISM_VTM923) | (1 << ISM_LAOS923)) |
#define | ISM_EUBAND ((1 << ISM_EU868) | (1 << ISM_EU433)) |
#define | ISM_NAAUBAND ((1 << ISM_NA915) | (1 << ISM_AU915)) |
#define | MAJOR_NUM "1" |
#define | MINOR_NUM "0" |
#define | PRODUCT "MLS_SDK" |
#define | REJECTED 0 |
#define | SHIFT0 (0) |
#define | SHIFT1 (1) |
#define | SHIFT10 (10) |
#define | SHIFT11 (11) |
#define | SHIFT12 (12) |
#define | SHIFT13 (13) |
#define | SHIFT14 (14) |
#define | SHIFT15 (15) |
#define | SHIFT16 (16) |
#define | SHIFT17 (17) |
#define | SHIFT18 (18) |
#define | SHIFT19 (19) |
#define | SHIFT2 (2) |
#define | SHIFT20 (20) |
#define | SHIFT21 (21) |
#define | SHIFT22 (22) |
#define | SHIFT23 (23) |
#define | SHIFT24 (24) |
#define | SHIFT25 (25) |
#define | SHIFT26 (26) |
#define | SHIFT27 (27) |
#define | SHIFT28 (28) |
#define | SHIFT29 (29) |
#define | SHIFT3 (3) |
#define | SHIFT30 (30) |
#define | SHIFT31 (31) |
#define | SHIFT4 (4) |
#define | SHIFT5 (5) |
#define | SHIFT6 (6) |
#define | SHIFT7 (7) |
#define | SHIFT8 (8) |
#define | SHIFT9 (9) |
#define | STACK_VER PRODUCT"_"MAJOR_NUM"_"MINOR_NUM"_"BUILD_TYPE"_"BUILD_NUM |
#define | STACK_VERSION_VALUE (0x01054000) |
Typedefs | |
typedef enum _IsmBand | IsmBand_t |
typedef enum _StackRetStatus | StackRetStatus_t |
#define ACCEPTED 1 |
#define BATTERY_LEVEL_INVALID (0xFF) |
#define BIT0 (1 << SHIFT0) |
Referenced by setNewChannel(), and ValidateChannelMaskT2().
#define BIT1 (1 << SHIFT1) |
#define BIT10 (1 << SHIFT10) |
#define BIT11 (1 << SHIFT11) |
#define BIT12 (1 << SHIFT12) |
#define BIT13 (1 << SHIFT13) |
#define BIT14 (1 << SHIFT14) |
#define BIT15 (1 << SHIFT15) |
#define BIT16 (1 << SHIFT16) |
#define BIT17 (1 << SHIFT17) |
#define BIT18 (1 << SHIFT18) |
#define BIT19 (1 << SHIFT19) |
#define BIT2 (1 << SHIFT2) |
#define BIT20 (1 << SHIFT20) |
#define BIT21 (1 << SHIFT21) |
#define BIT22 (1 << SHIFT22) |
#define BIT23 (1 << SHIFT23) |
#define BIT24 (1 << SHIFT24) |
#define BIT25 (1 << SHIFT25) |
#define BIT26 (1 << SHIFT26) |
#define BIT27 (1 << SHIFT27) |
#define BIT28 (1 << SHIFT28) |
#define BIT29 (1 << SHIFT29) |
#define BIT3 (1 << SHIFT3) |
#define BIT30 (1 << SHIFT30) |
#define BIT31 (1 << SHIFT31) |
#define BIT4 (1 << SHIFT4) |
#define BIT5 (1 << SHIFT5) |
#define BIT6 (1 << SHIFT6) |
#define BIT7 (1 << SHIFT7) |
Referenced by ASN1_GetNextElement().
#define BIT8 (1 << SHIFT8) |
#define BIT9 (1 << SHIFT9) |
#define BUILD_NUM "5" |
#define BUILD_TYPE "P" /* E or P */ |
#define DEFAULT_CALIBRATION_FREQ (FREQ_868100KHZ) |
#define DISABLED 0 |
#define ENABLED 1 |
#define EXTERNALLY_POWERED (0x00) |
#define FREQ_1020000KHZ 1020000000 |
#define FREQ_137000KHZ 137000000 |
#define FREQ_1600KHZ 1600000 |
Referenced by GenerateFrequency2().
#define FREQ_175000KHZ 175000000 |
#define FREQ_200KHZ 200000 |
Referenced by GenerateFrequency1().
#define FREQ_410000KHZ 410000000 |
#define FREQ_433050KHZ 433050000 |
#define FREQ_433300KHZ 433300000 |
#define FREQ_434665KHZ 434665000 |
#define FREQ_434790KHZ 434790000 |
#define FREQ_500KHZ 500000 |
#define FREQ_525000KHZ 525000000 |
#define FREQ_600KHZ 600000 |
Referenced by GenerateFrequencyReception(), and ValidateRxFreqT1().
#define FREQ_786000KHZ 862000000 |
#define FREQ_862000KHZ 862000000 |
#define FREQ_863000KHZ 863000000 |
#define FREQ_865000KHZ 865000000 |
Referenced by ValidateFreqIN().
#define FREQ_866550KHZ 866550000 |
#define FREQ_867000KHZ 867000000 |
Referenced by ValidateFreqIN().
#define FREQ_868100KHZ 868100000 |
#define FREQ_869525KHZ 869525000 |
#define FREQ_870000KHZ 870000000 |
#define FREQ_902300KHZ 902300000 |
#define FREQ_903000KHZ 903000000 |
#define FREQ_915000KHZ 915000000 |
Referenced by ValidateFrequencyAS().
#define FREQ_915200KHZ 915200000 |
#define FREQ_915900KHZ 915900000 |
#define FREQ_920000KHZ 920000000 |
Referenced by ValidateFreqJP(), and ValidateFrequencyAS().
#define FREQ_920900KHZ 920900000 |
Referenced by ValidateFreqKR().
#define FREQ_921900KHZ 921900000 |
#define FREQ_922000KHZ 922000000 |
Referenced by ValidateFrequencyAS().
#define FREQ_922100KHZ 922100000 |
Referenced by UpdateChannelIdStatusT4().
#define FREQ_923000KHZ 923000000 |
Referenced by ValidateFrequencyAS().
#define FREQ_923200KHZ 923200000 |
#define FREQ_923300KHZ 923300000 |
Referenced by ValidateFreqKR(), and ValidateRxFreqT1().
#define FREQ_925000KHZ 925000000 |
Referenced by ValidateFrequencyAS().
#define FREQ_927500KHZ 927500000 |
Referenced by ValidateRxFreqT1().
#define FREQ_928000KHZ 928000000 |
Referenced by ValidateFreqJP(), and ValidateFrequencyAS().
#define FREQ_928500KHZ 928500000 |
#define ISM_ASBAND ((1 << ISM_BRN923) | (1 << ISM_CMB923) | (1 << ISM_INS923) | (1 << ISM_NZ923) |(1 << ISM_SP923) | (1 << ISM_TWN923) | (1 << ISM_THAI923) | (1 << ISM_VTM923) | (1 << ISM_LAOS923)) |
Referenced by LORAREG_SupportedBands(), SearchAvailableChannel2(), setFrequency(), and UpdateChannelIdStatusT2().
Referenced by UpdateChannelIdStatus().
#define MAJOR_NUM "1" |
#define MINOR_NUM "0" |
#define PRODUCT "MLS_SDK" |
#define REJECTED 0 |
#define SHIFT0 (0) |
#define SHIFT1 (1) |
#define SHIFT10 (10) |
#define SHIFT11 (11) |
#define SHIFT12 (12) |
#define SHIFT13 (13) |
#define SHIFT14 (14) |
#define SHIFT15 (15) |
#define SHIFT16 (16) |
#define SHIFT17 (17) |
#define SHIFT18 (18) |
#define SHIFT19 (19) |
#define SHIFT2 (2) |
#define SHIFT20 (20) |
#define SHIFT21 (21) |
#define SHIFT22 (22) |
#define SHIFT23 (23) |
#define SHIFT24 (24) |
#define SHIFT25 (25) |
#define SHIFT26 (26) |
#define SHIFT27 (27) |
#define SHIFT28 (28) |
#define SHIFT29 (29) |
#define SHIFT3 (3) |
#define SHIFT30 (30) |
#define SHIFT31 (31) |
#define SHIFT4 (4) |
Referenced by getChBandDrT1(), setNewChannelsT1(), ValidateDataRange(), and ValidateDataRangeT2().
#define SHIFT5 (5) |
#define SHIFT6 (6) |
#define SHIFT7 (7) |
#define SHIFT8 (8) |
#define SHIFT9 (9) |
#define STACK_VER PRODUCT"_"MAJOR_NUM"_"MINOR_NUM"_"BUILD_TYPE"_"BUILD_NUM |
Referenced by mote_demo_init().
#define STACK_VERSION_VALUE (0x01054000) |
typedef enum _StackRetStatus StackRetStatus_t |
enum _IsmBand |
enum _StackRetStatus |