Serial Input & Output configuration.
Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
Configuration | |
| #define | USART_NCP (&USARTA0) |
| #define | USART_NCP_BAUDRATE 9600 |
| #define | USART_NCP_CHAR_LENGTH USART_CHSIZE_8BIT_gc |
| #define | USART_NCP_PARITY USART_PMODE_DISABLED_gc |
| #define | USART_NCP_STOP_BITS 1 |
| #define | USART_NCP_RX_ISR_ENABLE() usart_rx_complete_interrupt_enable(USART_NCP) |
| #define | USART_NCP_ISR_VECT() ISR(USART0_RX_vect) |
| #define USART_NCP (&USARTA0) |
Referenced by sio2ncp_init(), and sio2ncp_tx().
| #define USART_NCP_BAUDRATE 9600 |
Referenced by sio2ncp_init().
| #define USART_NCP_CHAR_LENGTH USART_CHSIZE_8BIT_gc |
| #define USART_NCP_ISR_VECT | ( | ) | ISR(USART0_RX_vect) |
| #define USART_NCP_PARITY USART_PMODE_DISABLED_gc |
| #define USART_NCP_RX_ISR_ENABLE | ( | ) | usart_rx_complete_interrupt_enable(USART_NCP) |
Referenced by sio2ncp_init().
| #define USART_NCP_STOP_BITS 1 |
1.8.5