This header file contains types and variable definition that are used within the TAL only.
Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
Macros | |
#define | _BV(x) (1 << (x)) |
Bit value – compute the bitmask for a bit position. More... | |
#define | PIN_ACK_OK_END() |
#define | PIN_ACK_OK_START() |
#define | PIN_ACK_WAITING_END() |
#define | PIN_ACK_WAITING_START() |
#define | PIN_BACKOFF_END() |
#define | PIN_BACKOFF_START() |
#define | PIN_BEACON_END() |
#define | PIN_BEACON_LOSS_TIMER_END() |
#define | PIN_BEACON_LOSS_TIMER_START() |
#define | PIN_BEACON_START() |
#define | PIN_CCA_END() |
#define | PIN_CCA_START() |
#define | PIN_CSMA_END() |
#define | PIN_CSMA_START() |
#define | PIN_NO_ACK_END() |
#define | PIN_NO_ACK_START() |
#define | PIN_TX_END() |
#define | PIN_TX_START() |
#define | PIN_WAITING_FOR_BEACON_END() |
#define | PIN_WAITING_FOR_BEACON_START() |
#define | TAL_PSDU_US_PER_OCTET(octets) ((uint16_t)(octets) * 32) |
Conversion of number of PSDU octets to duration in microseconds. More... | |
#define | TRX_IRQ_AWAKE_ONLY (TRX_IRQ_AWAKE) |
#define | TRX_IRQ_CCA_ED_ONLY (TRX_IRQ_CCA_ED_READY) |
#define | TRX_IRQ_DEFAULT |
#define | TRX_IRQ_NONE (0) |
Transceiver Access Macros | |
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#define | trx_reg_write(addr, data) (*(volatile uint8_t *)(addr)) = (data) |
Writes data into a transceiver register. More... | |
#define | trx_reg_read(addr) (*(volatile uint8_t *)(addr)) |
Reads current value from a transceiver register. More... | |
#define | trx_frame_read(data, length) memcpy((data), (void *)&TRXFBST, (length)) |
Reads frame buffer of the transceiver. More... | |
#define | trx_frame_write(data, length) memcpy((void *)&TRXFBST, (data), (length)) |
Writes data into frame buffer of the transceiver. More... | |
#define | trx_bit_read(arg) _trx_bit_read(arg) |
Subregister read. More... | |
#define | trx_bit_write(arg1, val) _trx_bit_write(arg1, val) |
Subregister write. More... | |
Transceiver Access Macros | |
#define | TRX_RST_HIGH() (TRXPR |= _BV(TRXRST)) |
Set Reset Bit. More... | |
#define | TRX_RST_LOW() (TRXPR &= ~_BV(TRXRST)) |
Clear Reset Bit. More... | |
#define | TRX_SLP_TR_HIGH() (TRXPR |= _BV(SLPTR)) |
Set Sleep/TR Bit. More... | |
#define | TRX_SLP_TR_LOW() (TRXPR &= ~_BV(SLPTR)) |
Clear Sleep/TR Bit. More... | |
Transceiver IRQ Macros | |
#define | CLEAR_TRX_IRQ_TX_END() (IRQ_STATUS = _BV(TX_END)) |
Clears TRX TX_END interrupt. More... | |
#define | CLEAR_TRX_IRQ_TSTAMP() (IRQ_STATUS = _BV(RX_START)) |
Clear RX TIME STAMP interrupt. More... | |
#define | CLEAR_TRX_IRQ_RX_END() (IRQ_STATUS = _BV(RX_END)) |
Clear TRX RX_END interrupt. More... | |
#define | CLEAR_TRX_IRQ_CCA_ED() (IRQ_STATUS = _BV(CCA_ED_DONE_EN)) |
Clear TRX CCA_ED_DONE interrupt. More... | |
#define | CLEAR_TRX_IRQ_AMI() (IRQ_STATUS = _BV(AMI)) |
Clear AMI interrupt. More... | |
#define | CLEAR_TRX_IRQ_BATMON() (BATMON = _BV(BAT_LOW)) |
Clear TRX BAT LOW interrupt. More... | |
#define | CLEAR_TRX_IRQ_AWAKE() (IRQ_STATUS = _BV(AWAKE)) |
Clear TRX AWAKE interrupt. More... | |
#define | CLEAR_TRX_IRQ_PLL_LOCK() (IRQ_STATUS = _BV(PLL_LOCK)) |
Clear TRX PLL LOCK interrupt. More... | |
#define | CLEAR_TRX_IRQ_PLL_UNLOCK() (IRQ_STATUS = _BV(PLL_UNLOCK)) |
Clear TRX PLL UNLOCK interrupt. More... | |
Typedefs | |
typedef enum tal_state_tag | tal_state_t |
TAL states. More... | |
typedef enum trx_irq_reason_tag | trx_irq_reason_t |
Transceiver interrupt reasons. More... | |
Enumerations | |
enum | tal_state_tag { TAL_IDLE = 0, TAL_TX_AUTO = 1, TAL_TX_DONE = 2, TAL_ED_RUNNING = 4, TAL_ED_DONE = 5 } |
TAL states. More... | |
enum | trx_irq_reason_tag { TRX_NO_IRQ = (0x00), TRX_IRQ_PLL_LOCK = (0x01), TRX_IRQ_PLL_UNLOCK = (0x02), TRX_IRQ_RX_START = (0x04), TRX_IRQ_RX_END = (0x08), TRX_IRQ_CCA_ED_READY = (0x10), TRX_IRQ_AMI = (0x20), TRX_IRQ_TX_END = (0x40), TRX_IRQ_AWAKE = (0x80) } |
Transceiver interrupt reasons. More... | |
Functions | |
void | ed_scan_done (void) |
Scan done. More... | |
tal_trx_status_t | set_trx_state (trx_cmd_t trx_cmd) |
Sets transceiver state. More... | |
Variables | |
uint8_t | last_frame_length |
frame_info_t * | mac_frame_ptr |
Frame pointer for the frame structure provided by the MCL. More... | |
volatile bool | tal_awake_end_flag |
uint8_t * | tal_frame_to_tx |
Pointer to the 15.4 frame created by the TAL to be handed over to the transceiver. More... | |
queue_t | tal_incoming_frame_queue |
Queue that contains all frames that are uploaded from the trx, but have not be processed by the MCL yet. More... | |
buffer_t * | tal_rx_buffer |
Pointer to receive buffer that can be used to upload a frame from the trx. More... | |
bool | tal_rx_on_required |
Indicates if the transceiver needs to switch on its receiver by tal_task(), because it could not be switched on due to buffer shortage. More... | |
uint32_t | tal_rx_timestamp |
Timestamp The timestamping is only required for beaconing networks or if timestamping is explicitly enabled. More... | |
tal_state_t | tal_state |
Current state of the TAL state machine. More... | |
tal_trx_status_t | tal_trx_status |
Current state of the transceiver. More... | |
#define _BV | ( | x | ) | (1 << (x)) |
Bit value – compute the bitmask for a bit position.
Referenced by switch_pll_on(), and tal_init().
#define CLEAR_TRX_IRQ_AMI | ( | ) | (IRQ_STATUS = _BV(AMI)) |
Clear AMI interrupt.
#define CLEAR_TRX_IRQ_AWAKE | ( | ) | (IRQ_STATUS = _BV(AWAKE)) |
Clear TRX AWAKE interrupt.
#define CLEAR_TRX_IRQ_BATMON | ( | ) | (BATMON = _BV(BAT_LOW)) |
Clear TRX BAT LOW interrupt.
#define CLEAR_TRX_IRQ_CCA_ED | ( | ) | (IRQ_STATUS = _BV(CCA_ED_DONE_EN)) |
Clear TRX CCA_ED_DONE interrupt.
#define CLEAR_TRX_IRQ_PLL_LOCK | ( | ) | (IRQ_STATUS = _BV(PLL_LOCK)) |
Clear TRX PLL LOCK interrupt.
#define CLEAR_TRX_IRQ_PLL_UNLOCK | ( | ) | (IRQ_STATUS = _BV(PLL_UNLOCK)) |
Clear TRX PLL UNLOCK interrupt.
#define CLEAR_TRX_IRQ_RX_END | ( | ) | (IRQ_STATUS = _BV(RX_END)) |
Clear TRX RX_END interrupt.
#define CLEAR_TRX_IRQ_TSTAMP | ( | ) | (IRQ_STATUS = _BV(RX_START)) |
Clear RX TIME STAMP interrupt.
#define CLEAR_TRX_IRQ_TX_END | ( | ) | (IRQ_STATUS = _BV(TX_END)) |
Clears TRX TX_END interrupt.
#define PIN_ACK_OK_END | ( | ) |
Referenced by handle_tx_end_irq().
#define PIN_ACK_OK_START | ( | ) |
Referenced by handle_tx_end_irq().
#define PIN_ACK_WAITING_END | ( | ) |
Referenced by handle_tx_end_irq().
#define PIN_ACK_WAITING_START | ( | ) |
#define PIN_BACKOFF_END | ( | ) |
#define PIN_BACKOFF_START | ( | ) |
#define PIN_BEACON_END | ( | ) |
Referenced by process_incoming_frame().
#define PIN_BEACON_LOSS_TIMER_END | ( | ) |
#define PIN_BEACON_LOSS_TIMER_START | ( | ) |
#define PIN_BEACON_START | ( | ) |
Referenced by process_incoming_frame().
#define PIN_CCA_END | ( | ) |
#define PIN_CCA_START | ( | ) |
#define PIN_CSMA_END | ( | ) |
#define PIN_CSMA_START | ( | ) |
#define PIN_NO_ACK_END | ( | ) |
#define PIN_NO_ACK_START | ( | ) |
Referenced by handle_tx_end_irq().
#define PIN_TX_END | ( | ) |
Referenced by handle_tx_end_irq().
#define PIN_TX_START | ( | ) |
#define PIN_WAITING_FOR_BEACON_END | ( | ) |
Referenced by process_incoming_frame().
#define PIN_WAITING_FOR_BEACON_START | ( | ) |
#define TAL_PSDU_US_PER_OCTET | ( | octets | ) | ((uint16_t)(octets) * 32) |
Conversion of number of PSDU octets to duration in microseconds.
#define trx_bit_read | ( | arg | ) | _trx_bit_read(arg) |
Subregister read.
arg | Subregister |
#define trx_bit_write | ( | arg1, | |
val | |||
) | _trx_bit_write(arg1, val) |
Subregister write.
[in] | arg1 | Subregister |
[out] | val | Data, which is muxed into the register |
Referenced by ed_scan_done(), handle_received_frame_irq(), send_frame(), set_trx_state(), tal_ant_div_config(), tal_ed_start(), tal_ext_pa_ctrl(), tal_generate_rand_seed(), tal_pib_set(), tal_rxaack_prom_mode_ctrl(), tal_rxsafe_mode_ctrl(), tal_set_frequency(), tal_set_frequency_regs(), tal_set_rx_sensitivity_level(), tal_set_tx_pwr(), tal_task(), trx_config(), and write_all_tal_pib_to_trx().
Reads frame buffer of the transceiver.
This macro reads the frame buffer of the transceiver.
[out] | data | Pointer to the location to store frame |
[in] | length | Number of bytes to be read from the frame buffer. |
Referenced by handle_received_frame_irq().
Writes data into frame buffer of the transceiver.
This macro writes data into the frame buffer of the transceiver
[in] | data | Pointer to data to be written into frame buffer |
[in] | length | Number of bytes to be written into frame buffer |
Referenced by send_frame().
#define TRX_IRQ_AWAKE_ONLY (TRX_IRQ_AWAKE) |
Referenced by set_trx_state().
#define TRX_IRQ_CCA_ED_ONLY (TRX_IRQ_CCA_ED_READY) |
#define TRX_IRQ_DEFAULT |
Referenced by ed_scan_done(), set_trx_state(), tal_ed_start(), tal_generate_rand_seed(), and trx_config().
#define TRX_IRQ_NONE (0) |
Referenced by tal_generate_rand_seed().
#define trx_reg_read | ( | addr | ) | (*(volatile uint8_t *)(addr)) |
Reads current value from a transceiver register.
This macro reads the current value from a transceiver register.
addr | Specifies the address of the trx register from which the data shall be read |
Writes data into a transceiver register.
This macro writes a value into transceiver register.
addr | Address of the trx register |
data | Data to be written to trx register |
#define TRX_RST_HIGH | ( | ) | (TRXPR |= _BV(TRXRST)) |
Set Reset Bit.
Referenced by trx_init(), and trx_reset().
#define TRX_RST_LOW | ( | ) | (TRXPR &= ~_BV(TRXRST)) |
Clear Reset Bit.
Referenced by trx_init(), and trx_reset().
#define TRX_SLP_TR_HIGH | ( | ) | (TRXPR |= _BV(SLPTR)) |
Set Sleep/TR Bit.
Referenced by send_frame(), and set_trx_state().
#define TRX_SLP_TR_LOW | ( | ) | (TRXPR &= ~_BV(SLPTR)) |
Clear Sleep/TR Bit.
Referenced by send_frame(), set_trx_state(), trx_init(), and trx_reset().
typedef enum tal_state_tag tal_state_t |
TAL states.
typedef enum trx_irq_reason_tag trx_irq_reason_t |
Transceiver interrupt reasons.
enum tal_state_tag |
enum trx_irq_reason_tag |
Transceiver interrupt reasons.
tal_trx_status_t set_trx_state | ( | trx_cmd_t | trx_cmd | ) |
Sets transceiver state.
trx_cmd | needs to be one of the trx commands |
References ANT_EXT_SW_DISABLE, ANT_EXT_SW_ENABLE, Assert, BUSY_RX, BUSY_RX_AACK, BUSY_TX, BUSY_TX_ARET, CMD_FORCE_PLL_ON, CMD_FORCE_TRX_OFF, CMD_PLL_ON, CMD_RX_AACK_ON, CMD_RX_ON, CMD_SLEEP, CMD_TRX_OFF, CMD_TX_ARET_ON, ENABLE_GLOBAL_IRQ, ENTER_CRITICAL_REGION, FUNC_PTR, LEAVE_CRITICAL_REGION, pal_timer_delay, pal_trx_irq_init_awake(), PAL_WAIT_1_US, PLL_ON, RG_CSMA_SEED_0, RG_IRQ_MASK, RG_IRQ_STATUS, RG_TRX_STATE, RX_AACK_ON, RX_ON, SR_ANT_EXT_SW_EN, SR_CSMA_SEED_1, SR_TRX_STATUS, STATE_TRANSITION_IN_PROGRESS, switch_pll_on(), tal_awake_end_flag, tal_trx_status, trx_awake_handler_cb(), trx_bit_read, trx_bit_write, TRX_IRQ_AWAKE_ONLY, TRX_IRQ_DEFAULT, TRX_OFF, TRX_OFF_TO_SLEEP_TIME_CLKM_CYCLES, trx_reg_write, TRX_SLEEP, TRX_SLP_TR_HIGH, TRX_SLP_TR_LOW, and TX_ARET_ON.
Referenced by ed_scan_done(), handle_tx_end_irq(), send_frame(), tal_ed_start(), tal_generate_rand_seed(), tal_pib_set(), tal_rx_enable(), tal_set_frequency(), tal_set_frequency_regs(), tal_task(), tal_trx_sleep(), tal_trx_wakeup(), and write_all_tal_pib_to_trx().
uint8_t last_frame_length |
Referenced by process_incoming_frame(), send_frame(), and tal_tx_frame().
frame_info_t* mac_frame_ptr |
Frame pointer for the frame structure provided by the MCL.
Referenced by tal_tx_frame(), and tx_done_handling().
volatile bool tal_awake_end_flag |
Referenced by set_trx_state(), and trx_awake_handler_cb().
uint8_t* tal_frame_to_tx |
Pointer to the 15.4 frame created by the TAL to be handed over to the transceiver.
Referenced by send_frame(), and tal_tx_frame().
queue_t tal_incoming_frame_queue |
Queue that contains all frames that are uploaded from the trx, but have not be processed by the MCL yet.
Referenced by handle_received_frame_irq(), mac_ready_to_sleep(), tal_init(), and tal_reset().
buffer_t* tal_rx_buffer |
Pointer to receive buffer that can be used to upload a frame from the trx.
Referenced by handle_received_frame_irq(), handle_tx_end_irq(), tal_init(), tal_pib_set(), and tal_rx_enable().
uint32_t tal_rx_timestamp |
Timestamp The timestamping is only required for beaconing networks or if timestamping is explicitly enabled.
Referenced by handle_received_frame_irq(), and trx_irq_timestamp_handler_cb().