EBI (External Bus Interface) SMC (Static Memory Controller) allows to connect a Static Memory to the microcontroller.
Modules | |
Related Project(s) | |
In this section you can find all the projects related to the MEMORY - EBI Static Memory Controller. | |
Macros | |
#define | EXT_SM_SIZE 17 |
SMC Peripheral Memory Size in log2(Bytes) More... | |
#define | NCS_CONTROLLED_READ false |
Whether read is controlled by NCS or by NRD. More... | |
#define | NCS_CONTROLLED_WRITE false |
Whether write is controlled by NCS or by NWE. More... | |
#define | NCS_RD_HOLD 0 |
Unit: ns. More... | |
#define | NCS_RD_PULSE 82 |
Unit: ns. More... | |
#define | NCS_RD_SETUP 0 |
Unit: ns. More... | |
#define | NCS_WR_HOLD 82 |
Unit: ns. More... | |
#define | NCS_WR_PULSE 82 |
Unit: ns. More... | |
#define | NCS_WR_SETUP 0 |
Unit: ns. More... | |
#define | NRD_CYCLE Max((NCS_RD_SETUP + NCS_RD_PULSE + NCS_RD_HOLD),(NRD_SETUP + NRD_PULSE + NRD_HOLD)) |
#define | NRD_HOLD 0 |
#define | NRD_PULSE 82 |
Unit: ns. More... | |
#define | NRD_SETUP 0 |
Unit: ns. More... | |
#define | NWAIT_MODE AVR32_SMC_EXNW_MODE_DISABLED |
Whether to use the NWAIT pin. More... | |
#define | NWE_CYCLE Max((NCS_WR_SETUP + NCS_WR_PULSE + NCS_WR_HOLD),(NWE_SETUP + NWE_PULSE + NWE_HOLD)) |
#define | NWE_HOLD 82 |
#define | NWE_PULSE 82 |
Unit: ns. More... | |
#define | NWE_SETUP 0 |
Unit: ns. More... | |
#define | PAGE_MODE false |
#define | PAGE_SIZE 0 |
#define | SMC_8_BIT_CHIPS false |
Whether 8-bit SM chips are connected on the SMC. More... | |
#define | SMC_DBW 16 |
SMC Data Bus Width. More... | |
#define | TDF_CYCLES 0 |
#define | TDF_OPTIM false |
Functions | |
unsigned char | smc_get_cs_size (unsigned char cs) |
Return the size of the peripheral connected . More... | |
void | smc_init (unsigned long hsb_hz) |
Initializes the AVR32 SMC module and the connected SRAM(s). More... | |
#define EXT_SM_SIZE 17 |
SMC Peripheral Memory Size in log2(Bytes)
#define NCS_CONTROLLED_READ false |
Whether read is controlled by NCS or by NRD.
#define NCS_CONTROLLED_WRITE false |
Whether write is controlled by NCS or by NWE.
#define NCS_RD_HOLD 0 |
Unit: ns.
#define NCS_RD_PULSE 82 |
Unit: ns.
#define NCS_RD_SETUP 0 |
Unit: ns.
#define NCS_WR_HOLD 82 |
Unit: ns.
#define NCS_WR_PULSE 82 |
Unit: ns.
#define NCS_WR_SETUP 0 |
Unit: ns.
#define NRD_CYCLE Max((NCS_RD_SETUP + NCS_RD_PULSE + NCS_RD_HOLD),(NRD_SETUP + NRD_PULSE + NRD_HOLD)) |
#define NRD_HOLD 0 |
#define NRD_PULSE 82 |
Unit: ns.
#define NRD_SETUP 0 |
Unit: ns.
#define NWAIT_MODE AVR32_SMC_EXNW_MODE_DISABLED |
Whether to use the NWAIT pin.
#define NWE_CYCLE Max((NCS_WR_SETUP + NCS_WR_PULSE + NCS_WR_HOLD),(NWE_SETUP + NWE_PULSE + NWE_HOLD)) |
#define NWE_HOLD 82 |
#define NWE_PULSE 82 |
Unit: ns.
#define NWE_SETUP 0 |
Unit: ns.
#define PAGE_MODE false |
#define PAGE_SIZE 0 |
#define SMC_8_BIT_CHIPS false |
Whether 8-bit SM chips are connected on the SMC.
#define SMC_DBW 16 |
SMC Data Bus Width.
#define TDF_CYCLES 0 |
#define TDF_OPTIM false |
unsigned char smc_get_cs_size | ( | unsigned char | cs | ) |
Return the size of the peripheral connected .
cs | The chip select value |
References smc_tab_cs_size.
void smc_init | ( | unsigned long | hsb_hz | ) |
Initializes the AVR32 SMC module and the connected SRAM(s).
hsb_hz | HSB frequency in Hz (the HSB frequency is applied to the SMC). |
Whether to use the NCS0 pin
Whether to use the NCS1 pin
Whether to use the NCS2 pin
Whether to use the NCS3 pin
Whether to use the NCS4 pin
Whether to use the NCS5 pin
References SMC_CS_SETUP, and smc_enable_muxed_pins().
Referenced by et024006_Init(), and main().