Chip-specific system clock management functions.
Copyright (c) 2010-2018 Microchip Technology Inc. and its subsidiaries.
#include <board.h>#include <compiler.h>#include <parts.h>#include <ccp.h>#include <osc.h>#include <pll.h>#include <conf_clock.h>Macros | |
| #define | CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1 |
| #define | CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1 |
| #define | CONFIG_USBCLK_SOURCE |
| Configuration symbol for the USB clock source. More... | |
System Clock Sources | |
| #define | SYSCLK_SRC_RC2MHZ CLK_SCLKSEL_RC2M_gc |
| Internal 2 MHz RC oscillator. More... | |
| #define | SYSCLK_SRC_RC32MHZ CLK_SCLKSEL_RC32M_gc |
| Internal 32 MHz RC oscillator. More... | |
| #define | SYSCLK_SRC_RC32KHZ CLK_SCLKSEL_RC32K_gc |
| Internal 32 KHz RC oscillator. More... | |
| #define | SYSCLK_SRC_XOSC CLK_SCLKSEL_XOSC_gc |
| External oscillator. More... | |
| #define | SYSCLK_SRC_PLL CLK_SCLKSEL_PLL_gc |
| Phase-Locked Loop. More... | |
| #define | SYSCLK_SRC_RC8MHZ CLK_SCLKSEL_RC8M_gc |
| Internal 8 MHz RC oscillator. More... | |
Prescaler A Setting (relative to CLKsys) | |
| #define | SYSCLK_PSADIV_1 CLK_PSADIV_1_gc |
| Do not prescale. More... | |
| #define | SYSCLK_PSADIV_2 CLK_PSADIV_2_gc |
| Prescale CLKper4 by 2. More... | |
| #define | SYSCLK_PSADIV_4 CLK_PSADIV_4_gc |
| Prescale CLKper4 by 4. More... | |
| #define | SYSCLK_PSADIV_8 CLK_PSADIV_8_gc |
| Prescale CLKper4 by 8. More... | |
| #define | SYSCLK_PSADIV_16 CLK_PSADIV_16_gc |
| Prescale CLKper4 by 16. More... | |
| #define | SYSCLK_PSADIV_32 CLK_PSADIV_32_gc |
| Prescale CLKper4 by 32. More... | |
| #define | SYSCLK_PSADIV_64 CLK_PSADIV_64_gc |
| Prescale CLKper4 by 64. More... | |
| #define | SYSCLK_PSADIV_128 CLK_PSADIV_128_gc |
| Prescale CLKper4 by 128. More... | |
| #define | SYSCLK_PSADIV_256 CLK_PSADIV_256_gc |
| Prescale CLKper4 by 256. More... | |
| #define | SYSCLK_PSADIV_512 CLK_PSADIV_512_gc |
| Prescale CLKper4 by 512. More... | |
| #define | SYSCLK_PSADIV_6 CLK_PSADIV_6_gc |
| Prescale CLKper4 by 6. More... | |
| #define | SYSCLK_PSADIV_10 CLK_PSADIV_10_gc |
| Prescale CLKper4 by 10. More... | |
| #define | SYSCLK_PSADIV_12 CLK_PSADIV_12_gc |
| Prescale CLKper4 by 12. More... | |
| #define | SYSCLK_PSADIV_24 CLK_PSADIV_24_gc |
| Prescale CLKper4 by 24. More... | |
| #define | SYSCLK_PSADIV_48 CLK_PSADIV_48_gc |
| Prescale CLKper4 by 48. More... | |
Prescaler B and C Setting (relative to CLKper4) | |
| #define | SYSCLK_PSBCDIV_1_1 CLK_PSBCDIV_1_1_gc |
| Do not prescale. More... | |
| #define | SYSCLK_PSBCDIV_1_2 CLK_PSBCDIV_1_2_gc |
| Prescale CLKper and CLKcpu by 2. More... | |
| #define | SYSCLK_PSBCDIV_4_1 CLK_PSBCDIV_4_1_gc |
| Prescale CLKper2, CLKper and CLKcpu by 4. More... | |
| #define | SYSCLK_PSBCDIV_2_2 CLK_PSBCDIV_2_2_gc |
| Prescale CLKper2 by 2, CLKper and CLKcpu by 4. More... | |
Clocks not associated with any port | |
| |
| #define | SYSCLK_DMA PR_DMA_bm |
| DMA Controller. More... | |
| #define | SYSCLK_EDMA PR_EDMA_bm |
| EDMA Controller. More... | |
| #define | SYSCLK_EVSYS PR_EVSYS_bm |
| Event System. More... | |
| #define | SYSCLK_RTC PR_RTC_bm |
| Real-Time Counter. More... | |
| #define | SYSCLK_EBI PR_EBI_bm |
| Ext Bus Interface. More... | |
| #define | SYSCLK_AES PR_AES_bm |
| AES Module. More... | |
| #define | SYSCLK_USB PR_USB_bm |
| USB Module. More... | |
| #define | SYSCLK_XCL PR_XCL_bm |
| USB Module. More... | |
Clocks on PORTA and PORTB | |
| |
| #define | SYSCLK_AC PR_AC_bm |
| Analog Comparator. More... | |
| #define | SYSCLK_ADC PR_ADC_bm |
| A/D Converter. More... | |
| #define | SYSCLK_DAC PR_DAC_bm |
| D/A Converter. More... | |
Clocks on PORTC, PORTD, PORTE and PORTF | |
| |
| #define | SYSCLK_TC0 PR_TC0_bm |
| Timer/Counter 0. More... | |
| #define | SYSCLK_TC1 PR_TC1_bm |
| Timer/Counter 1. More... | |
| #define | SYSCLK_TC4 PR_TC4_bm |
| Timer/Counter 0. More... | |
| #define | SYSCLK_TC5 PR_TC5_bm |
| Timer/Counter 1. More... | |
| #define | SYSCLK_HIRES PR_HIRES_bm |
| Hi-Res Extension. More... | |
| #define | SYSCLK_SPI PR_SPI_bm |
| SPI controller. More... | |
| #define | SYSCLK_USART0 PR_USART0_bm |
| USART 0. More... | |
| #define | SYSCLK_USART1 PR_USART1_bm |
| USART 1. More... | |
| #define | SYSCLK_TWI PR_TWI_bm |
| TWI controller. More... | |
RTC clock source identifiers | |
| #define | SYSCLK_RTCSRC_ULP CLK_RTCSRC_ULP_gc |
| 1kHz from internal ULP oscillator. More... | |
| #define | SYSCLK_RTCSRC_TOSC CLK_RTCSRC_TOSC_gc |
| 1.024kHz from 32.768kHz crystal oscillator TOSC More... | |
| #define | SYSCLK_RTCSRC_RCOSC CLK_RTCSRC_RCOSC_gc |
| 1.024kHz from 32.768kHz internal RC oscillator More... | |
| #define | SYSCLK_RTCSRC_TOSC32 CLK_RTCSRC_TOSC32_gc |
| 32.768kHz from crystal oscillator TOSC More... | |
| #define | SYSCLK_RTCSRC_RCOSC32 CLK_RTCSRC_RCOSC32_gc |
| 32.768kHz from internal RC oscillator More... | |
| #define | SYSCLK_RTCSRC_EXTCLK CLK_RTCSRC_EXTCLK_gc |
| External clock on TOSC1. More... | |
USB Clock Sources | |
| #define | USBCLK_SRC_RCOSC 0 |
| Internal 32 MHz RC oscillator. More... | |
| #define | USBCLK_SRC_PLL 1 |
| Phase-Locked Loop. More... | |
Enumerations | |
System Clock Port Numbers | |
| enum | sysclk_port_id { SYSCLK_PORT_GEN, SYSCLK_PORT_A, SYSCLK_PORT_B, SYSCLK_PORT_C, SYSCLK_PORT_D, SYSCLK_PORT_E, SYSCLK_PORT_F } |
Functions | |
Querying the system clock and its derived clocks | |
| static uint32_t | sysclk_get_main_hz (void) |
| Return the current rate in Hz of the main system clock. More... | |
| static uint32_t | sysclk_get_per4_hz (void) |
| Return the current rate in Hz of clk_PER4. More... | |
| static uint32_t | sysclk_get_per2_hz (void) |
| Return the current rate in Hz of clk_PER2. More... | |
| static uint32_t | sysclk_get_per_hz (void) |
| Return the current rate in Hz of clk_PER. More... | |
| static uint32_t | sysclk_get_cpu_hz (void) |
| Return the current rate in Hz of the CPU clock. More... | |
| static uint32_t | sysclk_get_peripheral_bus_hz (const volatile void *module) |
| Retrieves the current rate in Hz of the Peripheral Bus clock attached to the specified peripheral. More... | |
Enabling and disabling synchronous clocks | |
| void | sysclk_enable_module (enum sysclk_port_id port, uint8_t id) |
| Enable the clock to peripheral id on port port. More... | |
| void | sysclk_disable_module (enum sysclk_port_id port, uint8_t id) |
| Disable the clock to peripheral id on port port. More... | |
| static void | sysclk_enable_peripheral_clock (const volatile void *module) |
| Enable a peripheral's clock from its base address. More... | |
| static void | sysclk_disable_peripheral_clock (const volatile void *module) |
| Disable a peripheral's clock from its base address. More... | |
| static bool | sysclk_module_is_enabled (enum sysclk_port_id port, uint8_t id) |
| Check if the synchronous clock is enabled for a module. More... | |
System Clock Source and Prescaler configuration | |
| static void | sysclk_set_prescalers (uint8_t psadiv, uint8_t psbcdiv) |
| Set system clock prescaler configuration. More... | |
| static void | sysclk_set_source (uint8_t src) |
| Change the source of the main system clock. More... | |
| static void | sysclk_lock (void) |
| Lock the system clock configuration. More... | |
RTC clock source control | |
| static void | sysclk_rtcsrc_enable (uint8_t id) |
| Enable RTC clock with specified clock source. More... | |
| static void | sysclk_rtcsrc_disable (void) |
| Disable RTC clock. More... | |
System Clock Initialization | |
| void | sysclk_init (void) |
| Initialize the synchronous clock system. More... | |
| #define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1 |
Referenced by sysclk_get_per4_hz(), and sysclk_init().
| #define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1 |
Referenced by sysclk_get_per2_hz(), sysclk_get_per_hz(), and sysclk_init().
1.8.5