Xplained I/O Expansion Header Pin Mapping.
The Atmel Xplained evaluation boards have four 10-pin, 100mil headers that are used to access spare analog and digital pins on the board microcontroller. This file provides a common set of definitions mapping the Xplained expansion header J1
, J2
, J3
, and J4
pins to spare pins on the board microcontroller. Software can then use these common definitions to configure I/O for peripherals and expansion boards connected to the Xplained header blocks.
For each board type, the pin definitions are specified for the pins in each of the four headers. For UC3 based boards, if a pin can be used as an external interrupt source, the interrupt and GPIO pin mapping settings that are needed for initializing the external interrupt controller (EIC) are also provided.
Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
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#define | INVALID_PIN_NUMBER ((unsigned int) -1) |
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#define | XPLD_HEADER_J1_PIN1 IOPORT_CREATE_PIN(PORTF,0) |
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#define | XPLD_HEADER_J1_PIN2 IOPORT_CREATE_PIN(PORTF,1) |
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#define | XPLD_HEADER_J1_PIN3 IOPORT_CREATE_PIN(PORTF,2) |
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#define | XPLD_HEADER_J1_PIN4 IOPORT_CREATE_PIN(PORTF,3) |
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#define | XPLD_HEADER_J1_PIN5 IOPORT_CREATE_PIN(PORTF,4) |
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#define | XPLD_HEADER_J1_PIN6 IOPORT_CREATE_PIN(PORTF,5) |
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#define | XPLD_HEADER_J1_PIN7 IOPORT_CREATE_PIN(PORTF,6) |
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#define | XPLD_HEADER_J1_PIN8 IOPORT_CREATE_PIN(PORTF,7) |
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#define | XPLD_HEADER_J2_PIN1 IOPORT_CREATE_PIN(PORTA,0) |
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#define | XPLD_HEADER_J2_PIN2 IOPORT_CREATE_PIN(PORTA,1) |
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#define | XPLD_HEADER_J2_PIN3 IOPORT_CREATE_PIN(PORTA,2) |
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#define | XPLD_HEADER_J2_PIN4 IOPORT_CREATE_PIN(PORTA,3) |
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#define | XPLD_HEADER_J2_PIN5 IOPORT_CREATE_PIN(PORTA,4) |
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#define | XPLD_HEADER_J2_PIN6 IOPORT_CREATE_PIN(PORTA,5) |
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#define | XPLD_HEADER_J2_PIN7 IOPORT_CREATE_PIN(PORTA,6) |
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#define | XPLD_HEADER_J2_PIN8 IOPORT_CREATE_PIN(PORTA,7) |
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#define | XPLD_HEADER_J3_PIN1 IOPORT_CREATE_PIN(PORTD,0) |
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#define | XPLD_HEADER_J3_PIN2 IOPORT_CREATE_PIN(PORTD,1) |
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#define | XPLD_HEADER_J3_PIN3 IOPORT_CREATE_PIN(PORTD,2) |
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#define | XPLD_HEADER_J3_PIN4 IOPORT_CREATE_PIN(PORTD,3) |
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#define | XPLD_HEADER_J3_PIN5 IOPORT_CREATE_PIN(PORTD,4) |
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#define | XPLD_HEADER_J3_PIN6 IOPORT_CREATE_PIN(PORTD,5) |
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#define | XPLD_HEADER_J3_PIN7 IOPORT_CREATE_PIN(PORTR,0) |
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#define | XPLD_HEADER_J3_PIN8 IOPORT_CREATE_PIN(PORTR,1) |
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#define | XPLD_HEADER_J4_PIN1 IOPORT_CREATE_PIN(PORTC,0) |
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#define | XPLD_HEADER_J4_PIN2 IOPORT_CREATE_PIN(PORTC,1) |
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#define | XPLD_HEADER_J4_PIN3 IOPORT_CREATE_PIN(PORTC,2) |
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#define | XPLD_HEADER_J4_PIN4 IOPORT_CREATE_PIN(PORTC,3) |
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#define | XPLD_HEADER_J4_PIN5 IOPORT_CREATE_PIN(PORTC,4) |
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#define | XPLD_HEADER_J4_PIN6 IOPORT_CREATE_PIN(PORTC,5) |
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#define | XPLD_HEADER_J4_PIN7 IOPORT_CREATE_PIN(PORTC,6) |
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#define | XPLD_HEADER_J4_PIN8 IOPORT_CREATE_PIN(PORTC,7) |
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#define | XPLD_HEADER_J1_PORT (PORTF) |
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#define | XPLD_HEADER_J1_INT0_vect (PORTF_INT0_vect) |
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#define | XPLD_HEADER_J1_INT1_vect (PORTF_INT1_vect) |
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#define | XPLD_HEADER_J2_PORT (PORTA) |
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#define | XPLD_HEADER_J2_INT0_vect (PORTA_INT0_vect) |
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#define | XPLD_HEADER_J2_INT1_vect (PORTA_INT1_vect) |
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#define | XPLD_HEADER_J3_PORT (PORTD) |
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#define | XPLD_HEADER_J3_INT0_vect (PORTD_INT0_vect) |
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#define | XPLD_HEADER_J3_INT1_vect (PORTD_INT1_vect) |
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#define | XPLD_HEADER_J4_PORT (PORTC) |
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#define | XPLD_HEADER_J4_INT0_vect (PORTC_INT0_vect) |
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#define | XPLD_HEADER_J4_INT1_vect (PORTC_INT1_vect) |
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